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/third_party/wpa_supplicant/wpa_supplicant-2.9/src/crypto/
H A Dmilenage.c27 * @opc: OPc = 128-bit value derived from OP and K
36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f1() argument
44 tmp1[i] = _rand[i] ^ opc[i]; in milenage_f1()
57 tmp3[(i + 8) % 16] = tmp2[i] ^ opc[i]; in milenage_f1()
67 tmp1[i] ^= opc[i]; in milenage_f1()
78 * @opc: OPc = 128-bit value derived from OP and K
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f2345() argument
96 tmp1[i] = _rand[i] ^ opc[i]; in milenage_f2345()
108 tmp1[i] = tmp2[i] ^ opc[i]; in milenage_f2345()
114 tmp3[i] ^= opc[ in milenage_f2345()
173 milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len) milenage_generate() argument
208 milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, u8 *sqn) milenage_auts() argument
235 gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) gsm_milenage() argument
270 milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, const u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len, u8 *auts) milenage_check() argument
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H A Dmilenage.h12 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
15 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts,
17 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres,
19 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand,
22 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand,
24 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand,
/third_party/wpa_supplicant/wpa_supplicant-2.9_standard/src/crypto/
H A Dmilenage.c27 * @opc: OPc = 128-bit value derived from OP and K
36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f1() argument
44 tmp1[i] = _rand[i] ^ opc[i]; in milenage_f1()
57 tmp3[(i + 8) % 16] = tmp2[i] ^ opc[i]; in milenage_f1()
67 tmp1[i] ^= opc[i]; in milenage_f1()
78 * @opc: OPc = 128-bit value derived from OP and K
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f2345() argument
96 tmp1[i] = _rand[i] ^ opc[i]; in milenage_f2345()
108 tmp1[i] = tmp2[i] ^ opc[i]; in milenage_f2345()
114 tmp3[i] ^= opc[ in milenage_f2345()
173 milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len) milenage_generate() argument
208 milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, u8 *sqn) milenage_auts() argument
235 gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) gsm_milenage() argument
270 milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, const u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len, u8 *auts) milenage_check() argument
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H A Dmilenage.h12 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
15 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts,
17 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres,
19 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand,
22 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand,
24 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand,
/third_party/mesa3d/src/freedreno/ir3/
H A Dinstr-a3xx.h56 #define _OPC(cat, opc) (((cat) << NOPC_BITS) | opc)
223 /* NOTE that these are 8+opc from their highp equivs, so it's possible
224 * that the high order bit in the opc field has been repurposed for
226 * still use the same opc as highp
266 /* cat5 meta instructions, placed above the cat5 opc field's size */
394 #define opc_cat(opc) ((int)((opc) >> NOPC_BITS))
395 #define opc_op(opc) ((unsigned)((opc)
589 is_sat_compatible(opc_t opc) is_sat_compatible() argument
612 is_mad(opc_t opc) is_mad() argument
628 is_madsh(opc_t opc) is_madsh() argument
640 is_local_atomic(opc_t opc) is_local_atomic() argument
661 is_global_a3xx_atomic(opc_t opc) is_global_a3xx_atomic() argument
682 is_global_a6xx_atomic(opc_t opc) is_global_a6xx_atomic() argument
703 is_bindless_atomic(opc_t opc) is_bindless_atomic() argument
724 is_atomic(opc_t opc) is_atomic() argument
731 is_ssbo(opc_t opc) is_ssbo() argument
746 is_isam(opc_t opc) is_isam() argument
759 is_cat2_float(opc_t opc) is_cat2_float() argument
783 is_cat3_float(opc_t opc) is_cat3_float() argument
[all...]
H A Dir3_validate.c112 if (phi->opc != OPC_META_PHI) in validate_phi_src()
194 } else if (opc_cat(instr->opc) == 1 || opc_cat(instr->opc) == 6) { in validate_instr()
196 } else if (opc_cat(instr->opc) == 0) { in validate_instr()
198 } else if (instr->opc == OPC_META_PARALLEL_COPY) { in validate_instr()
202 } else if (instr->opc == OPC_ANY_MACRO || instr->opc == OPC_ALL_MACRO || in validate_instr()
203 instr->opc == OPC_READ_FIRST_MACRO || in validate_instr()
204 instr->opc == OPC_READ_COND_MACRO) { in validate_instr()
226 switch (opc_cat(instr->opc)) { in validate_instr()
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H A Dir3.c312 if ((instr->opc == OPC_STP || instr->opc == OPC_LDP)) { in ir3_collect_info()
318 if (instr->opc == OPC_STP) in ir3_collect_info()
324 if ((instr->opc == OPC_BARY_F || instr->opc == OPC_FLAT_B) && in ir3_collect_info()
328 if (instr->opc == OPC_SHPS) in ir3_collect_info()
340 if (instr->opc == OPC_NOP) { in ir3_collect_info()
344 info->instrs_per_cat[opc_cat(instr->opc)] += 1 + instr->repeat; in ir3_collect_info()
348 if (instr->opc == OPC_MOV) { in ir3_collect_info()
386 if (instr->opc in ir3_collect_info()
501 instr_create(struct ir3_block *block, opc_t opc, int ndst, int nsrc) instr_create() argument
525 ir3_instr_create(struct ir3_block *block, opc_t opc, int ndst, int nsrc) ir3_instr_create() argument
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H A Dir3_cp.c178 (is_cat2_float(instr->opc) || is_cat3_float(instr->opc)) ? true : false; in lower_immed()
276 if (!is_mad(instr->opc)) in try_swap_mad_two_srcs()
379 opc_cat(instr->opc) != 0) { in reg_cp()
436 if ((opc_cat(instr->opc) == 3) && (n == 2) && in reg_cp()
450 if (instr->opc == OPC_MOV && !type_float(instr->cat1.src_type)) in reg_cp()
452 if (!is_cat2_float(instr->opc) && !is_cat3_float(instr->opc)) in reg_cp()
459 if (is_cat2_float(instr->opc) || is_cat3_float(instr->opc)) in reg_cp()
[all...]
H A Dir3_cf.c31 if (instr->opc != OPC_MOV) in is_safe_conv()
89 opc_t opc = conv_src->opc; in all_uses_safe_conv() local
92 opc_t new_opc = opc; in all_uses_safe_conv()
97 if (!first && opc != new_opc) in all_uses_safe_conv()
100 opc = new_opc; in all_uses_safe_conv()
102 conv_src->opc = opc; in all_uses_safe_conv()
115 assert(use->opc == OPC_MOV); in rewrite_src_uses()
132 if (conv->opc ! in try_conversion_folding()
[all...]
H A Dir3_print.c104 switch (instr->opc) { in print_instr_name()
126 mesa_log_stream_printf(stream, "_meta:%d", instr->opc); in print_instr_name()
129 } else if (opc_cat(instr->opc) == 1) { in print_instr_name()
130 if (instr->opc == OPC_MOV) { in print_instr_name()
137 disasm_a3xx_instr_name(instr->opc)); in print_instr_name()
140 if (instr->opc == OPC_SCAN_MACRO) { in print_instr_name()
184 if (instr->opc != OPC_MOVMSK && instr->opc != OPC_SCAN_MACRO) { in print_instr_name()
189 } else if (instr->opc == OPC_B) { in print_instr_name()
203 mesa_log_stream_printf(stream, "%s", disasm_a3xx_instr_name(instr->opc)); in print_instr_name()
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H A Dir3_lower_spill.c191 if ((instr->opc == OPC_SPILL_MACRO || instr->opc == OPC_RELOAD_MACRO) && in add_spill_reload_deps()
196 if (instr->opc == OPC_SPILL_MACRO) in add_spill_reload_deps()
204 if ((instr->opc == OPC_SPILL_MACRO || instr->opc == OPC_RELOAD_MACRO) && in add_spill_reload_deps()
209 if (instr->opc == OPC_SPILL_MACRO) in add_spill_reload_deps()
219 if (instr->opc == OPC_SPILL_MACRO) { in ir3_lower_spill()
222 } else if (instr->opc == OPC_RELOAD_MACRO) { in ir3_lower_spill()
231 if (instr->opc == OPC_SPILL_MACRO) in ir3_lower_spill()
232 instr->opc in ir3_lower_spill()
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H A Dir3.h260 opc_t opc; member
713 struct ir3_instruction *ir3_instr_create(struct ir3_block *block, opc_t opc,
823 return (opc_cat(instr->opc) == 0); in is_flow()
829 return instr->opc == OPC_KILL || instr->opc == OPC_DEMOTE; in is_kill_or_demote()
835 return instr->opc == OPC_NOP; in is_nop()
863 switch (instr->opc) { in is_same_type_mov()
909 if (instr->opc != OPC_MOV) in is_const_mov()
926 switch (instr->opc) { in is_subgroup_cond_mov_macro()
944 return (1 <= opc_cat(instr->opc)) in is_alu()
1063 cat3_half_opc(opc_t opc) cat3_half_opc() argument
1082 cat3_full_opc(opc_t opc) cat3_full_opc() argument
1101 cat4_half_opc(opc_t opc) cat4_half_opc() argument
1116 cat4_full_opc(opc_t opc) cat4_full_opc() argument
1315 ir3_cat2_int(opc_t opc) ir3_cat2_int() argument
1358 ir3_cat2_absneg(opc_t opc) ir3_cat2_absneg() argument
1419 ir3_cat3_absneg(opc_t opc) ir3_cat3_absneg() argument
1577 ir3_try_swap_signedness(opc_t opc, bool *can_swap) ir3_try_swap_signedness() argument
2331 ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, unsigned wrmask, unsigned flags, struct ir3_instruction *samp_tex, struct ir3_instruction *src0, struct ir3_instruction *src1) ir3_SAM() argument
[all...]
H A Dir3_delay.c74 if (consumer->opc == OPC_END || consumer->opc == OPC_CHMASK) in ir3_delayslots()
89 if ((is_mad(consumer->opc) || is_madsh(consumer->opc)) && (n == 2)) { in ir3_delayslots()
106 (is_flow(n) && (n->opc != OPC_JUMP) && (n->opc != OPC_B)); in count_instruction()
155 if (assigner->opc == OPC_MOVMSK) in ir3_delayslots_with_repeat()
182 if (consumer->opc == OPC_SWZ || consumer->opc == OPC_GAT) in ir3_delayslots_with_repeat()
188 if (assigner->opc in ir3_delayslots_with_repeat()
[all...]
H A Dir3_legalize.c155 if (is_meta(n) && (n->opc != OPC_META_TEX_PREFETCH)) in legalize_block()
164 if ((last_n && is_barrier(last_n)) || n->opc == OPC_SHPE) { in legalize_block()
172 if (last_n && (last_n->opc == OPC_PREDT)) { in legalize_block()
225 if ((n->flags & IR3_INSTR_SS) && (opc_cat(n->opc) >= 5)) { in legalize_block()
233 if (list_is_empty(&block->instr_list) && (opc_cat(n->opc) >= 5)) in legalize_block()
238 ctx->type != MESA_SHADER_COMPUTE && n->opc == OPC_SAMGQ) { in legalize_block()
245 samgp->opc = OPC_SAMGP0 + i; in legalize_block()
264 if (n->opc == OPC_META_TEX_PREFETCH) in legalize_block()
266 } else if (n->opc == OPC_RESINFO) { in legalize_block()
275 } else if (is_atomic(n->opc)) { in legalize_block()
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H A Dir3_cse.c43 hash = HASH(hash, instr->opc); in hash_instr()
60 if (opc_cat(instr->opc) == 1) { in hash_instr()
72 if (i1->opc != i2->opc) in instrs_equal()
111 if (opc_cat(i1->opc) == 1) { in instrs_equal()
124 if (instr->opc != OPC_META_COLLECT && instr->opc != OPC_MOV) in instr_can_cse()
H A Dir3_lower_subgroups.c93 binop(struct ir3_block *block, opc_t opc, struct ir3_register *dst, in binop() argument
96 struct ir3_instruction *instr = ir3_instr_create(block, opc, 1, 2); in binop()
110 triop(struct ir3_block *block, opc_t opc, struct ir3_register *dst, in triop() argument
114 struct ir3_instruction *instr = ir3_instr_create(block, opc, 1, 3); in triop()
130 do_reduce(struct ir3_block *block, reduce_op_t opc, in do_reduce() argument
134 switch (opc) { in do_reduce()
240 switch (instr->opc) { in lower_instr()
257 if (instr->opc == OPC_SCAN_MACRO) { in lower_instr()
311 if (instr->opc == OPC_BALLOT_MACRO) { in lower_instr()
320 switch (instr->opc) { in lower_instr()
[all...]
/third_party/mesa3d/src/freedreno/afuc/
H A Ddisasm.c102 print_alu_name(afuc_opc opc, uint32_t instr) in print_alu_name() argument
104 if (opc == OPC_ADD) { in print_alu_name()
106 } else if (opc == OPC_ADDHI) { in print_alu_name()
108 } else if (opc == OPC_SUB) { in print_alu_name()
110 } else if (opc == OPC_SUBHI) { in print_alu_name()
112 } else if (opc == OPC_AND) { in print_alu_name()
114 } else if (opc == OPC_OR) { in print_alu_name()
116 } else if (opc == OPC_XOR) { in print_alu_name()
118 } else if (opc == OPC_NOT) { in print_alu_name()
120 } else if (opc in print_alu_name()
294 afuc_opc opc; disasm_instr() local
420 unsigned opc, p; disasm_instr() local
726 afuc_opc opc; setup_labels() local
[all...]
H A Dasm.c146 afuc_opc opc; in emit_instructions() local
164 opc = OPC_NOP; in emit_instructions()
193 opc = tok2alu(ai->tok); in emit_instructions()
198 opc = OPC_ALU; in emit_instructions()
215 opc = OPC_MOVI; in emit_instructions()
224 opc = OPC_MOVI; in emit_instructions()
230 opc = OPC_ALU; in emit_instructions()
244 opc = OPC_CWRITE6; in emit_instructions()
246 opc = OPC_CREAD6; in emit_instructions()
248 opc in emit_instructions()
[all...]
H A Dafuc.h211 afuc_get_opc(afuc_instr *ai, afuc_opc *opc, bool *rep) in afuc_get_opc() argument
214 *opc = ai->opc_r >> 1; in afuc_get_opc()
217 *opc = ai->opc_r; in afuc_get_opc()
223 afuc_set_opc(afuc_instr *ai, afuc_opc opc, bool rep) in afuc_set_opc() argument
225 if (opc < 0x30) { in afuc_set_opc()
226 ai->opc_r = opc << 1; in afuc_set_opc()
229 ai->opc_r = opc; in afuc_set_opc()
H A Demu.c51 emu_alu(struct emu *emu, afuc_opc opc, uint32_t src1, uint32_t src2) in emu_alu() argument
54 switch (opc) { in emu_alu()
103 printf("unhandled alu opc: 0x%02x\n", opc); in emu_alu()
126 afuc_opc opc; in emu_instr() local
129 afuc_get_opc(instr, &opc, &rep); in emu_instr()
131 switch (opc) { in emu_instr()
135 uint32_t val = emu_alu(emu, opc, in emu_instr()
252 if (opc == OPC_BRNEI) { in emu_instr()
255 } else if (opc in emu_instr()
315 afuc_opc opc; emu_step() local
[all...]
/third_party/mesa3d/src/freedreno/ir2/
H A Ddisasm-a2xx.c144 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc}
460 #define INSTR(opc, name, fxn) [opc] = {name, fxn}
486 printf("%s", fetch_instructions[fetch->opc].name); in disasm_fetch()
487 fetch_instructions[fetch->opc].fxn(fetch); in disasm_fetch()
500 return (cf->opc == EXEC) || (cf->opc == EXEC_END) || in cf_exec()
501 (cf->opc in cf_exec()
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H A Dinstr-a2xx.h221 instr_cf_opc_t opc : 4; member
230 instr_cf_opc_t opc : 4; member
243 instr_cf_opc_t opc : 4; member
252 instr_cf_opc_t opc : 4; member
262 instr_cf_opc_t opc : 4; member
319 instr_fetch_opc_t opc : 5; member
353 instr_fetch_opc_t opc : 5; member
386 instr_fetch_opc_t opc : 5; member
/third_party/libunwind/libunwind/src/ia64/
H A DGscript.c243 enum ia64_script_insn_opcode opc; in compile_reg() local
251 opc = IA64_INSN_MOVE; in compile_reg()
262 opc = IA64_INSN_MOVE_STACKED_NAT; in compile_reg()
264 opc = IA64_INSN_MOVE_STACKED; in compile_reg()
272 opc = IA64_INSN_MOVE_NAT; in compile_reg()
278 opc = IA64_INSN_MOVE_SCRATCH_NAT; in compile_reg()
280 opc = IA64_INSN_MOVE_SCRATCH; in compile_reg()
299 opc = IA64_INSN_MOVE_SCRATCH; in compile_reg()
309 opc = IA64_INSN_MOVE_NO_NAT; in compile_reg()
313 opc in compile_reg()
497 unsigned long opc, dst; run_script() local
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/third_party/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_disasm.c41 uint32_t opc : 6; member
458 #define OPC(opc) [INST_OPCODE_##opc] = {#opc, print_opc_default}
459 #define OPC_MOV(opc) [INST_OPCODE_##opc] = {#opc, print_opc_mov}
460 #define OPC_TEX(opc) [INST_OPCODE_##opc] = {#opc, print_opc_te
530 const unsigned opc = instr->opc | (instr->opcode_bit6 << 6); print_instr() local
[all...]
/third_party/mesa3d/src/freedreno/isa/
H A Dencode.c29 #include "ir3/instr-a3xx.h" // TODO move opc's and other useful things to ir3-instr.h or so
79 * encoding, so there are some cases where we need to fixup the opc in __instruction_case()
85 if (instr->opc == OPC_B) { in __instruction_case()
102 } else if (instr->opc == OPC_MOV) { in __instruction_case()
117 } else if (instr->opc == OPC_DEMOTE) { in __instruction_case()
120 if (instr->opc == OPC_RESINFO) { in __instruction_case()
122 } else if (instr->opc == OPC_LDIB) { in __instruction_case()
124 } else if (instr->opc == OPC_STIB) { in __instruction_case()
128 return instr->opc; in __instruction_case()
246 if (is_global_a3xx_atomic(instr->opc)) { in extract_cat6_SRC()
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