Searched refs:offset21 (Results 1 - 4 of 4) sorted by relevance
/third_party/node/deps/v8/src/codegen/mips/ |
H A D | assembler-mips.cc | 1230 void Assembler::GenInstrImmediate(Opcode opcode, Register rs, int32_t offset21, in GenInstrImmediate() argument 1232 DCHECK(rs.is_valid() && (is_int21(offset21))); in GenInstrImmediate() 1233 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask); in GenInstrImmediate() 1238 uint32_t offset21) { in GenInstrImmediate() 1239 DCHECK(rs.is_valid() && (is_uint21(offset21))); in GenInstrImmediate() 1240 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask); in GenInstrImmediate() 1237 GenInstrImmediate(Opcode opcode, Register rs, uint32_t offset21) GenInstrImmediate() argument
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H A D | assembler-mips.h | 1713 Opcode opcode, Register rs, int32_t offset21, 1715 void GenInstrImmediate(Opcode opcode, Register rs, uint32_t offset21);
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/third_party/node/deps/v8/src/codegen/mips64/ |
H A D | assembler-mips64.cc | 1159 void Assembler::GenInstrImmediate(Opcode opcode, Register rs, int32_t offset21, in GenInstrImmediate() argument 1161 DCHECK(rs.is_valid() && (is_int21(offset21))); in GenInstrImmediate() 1162 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask); in GenInstrImmediate() 1167 uint32_t offset21) { in GenInstrImmediate() 1168 DCHECK(rs.is_valid() && (is_uint21(offset21))); in GenInstrImmediate() 1169 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask); in GenInstrImmediate() 1166 GenInstrImmediate(Opcode opcode, Register rs, uint32_t offset21) GenInstrImmediate() argument
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H A D | assembler-mips64.h | 1749 Opcode opcode, Register rs, int32_t offset21, 1751 void GenInstrImmediate(Opcode opcode, Register rs, uint32_t offset21);
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