| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3_delay.c | 82 /* In mergedregs mode, there is an extra 2-cycle penalty when half of in ir3_delayslots()
216 unsigned consumer_n, bool mergedregs) in delay_calc_srcn()
223 /* In the mergedregs case or when the register is a special register, in delay_calc_srcn()
226 if ((!mergedregs || is_reg_special(src) || is_reg_special(dst)) && in delay_calc_srcn()
244 regmask_t *in_mask, bool mergedregs) in delay_calc()
278 assigner, consumer, dst_n, src_n, mergedregs); in delay_calc()
311 &mask, mergedregs); in delay_calc()
327 bool mergedregs) in ir3_delay_calc()
330 regmask_init(&mask, mergedregs); in ir3_delay_calc()
336 return delay_calc(block, NULL, instr, 0, &mask, mergedregs); in ir3_delay_calc()
214 delay_calc_srcn(struct ir3_instruction *assigner, struct ir3_instruction *consumer, unsigned assigner_n, unsigned consumer_n, bool mergedregs) delay_calc_srcn() argument
242 delay_calc(struct ir3_block *block, struct ir3_instruction *start, struct ir3_instruction *consumer, unsigned distance, regmask_t *in_mask, bool mergedregs) delay_calc() argument
326 ir3_delay_calc(struct ir3_block *block, struct ir3_instruction *instr, bool mergedregs) ir3_delay_calc() argument
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| H A D | ir3_legalize.c | 97 bool mergedregs = ctx->so->mergedregs; in legalize_block() local
167 regmask_init(&state->needs_ss_war, mergedregs); in legalize_block()
168 regmask_init(&state->needs_ss, mergedregs); in legalize_block()
169 regmask_init(&state->needs_sy, mergedregs); in legalize_block()
174 regmask_init(&state->needs_ss_war, mergedregs); in legalize_block()
175 regmask_init(&state->needs_ss, mergedregs); in legalize_block()
200 regmask_init(&state->needs_ss_war, mergedregs); in legalize_block()
201 regmask_init(&state->needs_ss, mergedregs); in legalize_block()
206 regmask_init(&state->needs_sy, mergedregs); in legalize_block()
915 bool mergedregs = so->mergedregs; ir3_legalize() local
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| H A D | ir3_disk_cache.c | 179 v->mergedregs = blob_read_uint32(blob); in ir3_retrieve_variant()
192 v->binning->mergedregs = v->mergedregs; in ir3_retrieve_variant()
206 blob_write_uint32(blob, v->mergedregs); in ir3_store_variant()
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| H A D | ir3.h | 1728 struct ir3_instruction *instr, bool mergedregs);
2455 bool mergedregs; member
2462 if (regmask->mergedregs) { in __regmask_get()
2490 if (regmask->mergedregs) { in __regmask_set()
2515 if (regmask->mergedregs) { in __regmask_clear()
2538 regmask_init(regmask_t *regmask, bool mergedregs) in regmask_init() argument
2541 regmask->mergedregs = mergedregs; in regmask_init()
2547 assert(dst->mergedregs == a->mergedregs); in regmask_or()
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| H A D | ir3_assembler.c | 46 v->mergedregs = true; in ir3_parse_asm()
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| H A D | ir3_ra.c | 119 * in mergedregs mode, and count as 4 half-units of register pressure in interval_insert()
2400 add_pressure(&cur_pressure, input->dsts[0], v->mergedregs); in calc_min_limit_pressure()
2417 if (!(dst->flags & IR3_REG_HALF) || v->mergedregs) in calc_min_limit_pressure()
2451 add_pressure(&cur_pressure, dst, v->mergedregs); in calc_min_limit_pressure()
2465 add_pressure(&cur_pressure, interval->reg, v->mergedregs); in calc_min_limit_pressure()
2479 add_pressure(&cur_pressure, dst, v->mergedregs); in calc_min_limit_pressure()
2531 if (v->mergedregs) { in calc_limit_pressure_for_cs_with_barrier()
2534 /* TODO: Handle !mergedregs case, probably we would have to do this in calc_limit_pressure_for_cs_with_barrier()
2550 ctx->merged_regs = v->mergedregs; in ir3_ra()
2618 if (!v->mergedregs) in ir3_ra()
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| H A D | ir3_shader.c | 84 if (!v->mergedregs) { in fixup_regfootprint()
101 if (!v->mergedregs) { in fixup_regfootprint()
115 if (!v->mergedregs) { in fixup_regfootprint()
336 v->mergedregs = shader->compiler->gen >= 6; in alloc_variant()
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| H A D | ir3_postsched.c | 503 .merged = ctx->v->mergedregs, in calculate_forward_deps()
517 .merged = ctx->v->mergedregs, in calculate_reverse_deps()
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| H A D | ir3_ra_validate.c | 556 ctx->merged_regs = v->mergedregs; in ir3_ra_validate()
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| H A D | ir3_lower_parallelcopy.c | 363 * mergedregs case, we can 32-bit copies which are only blocked on one in _handle_copies()
487 if (v->mergedregs) { in handle_copies()
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| H A D | ir3_shader.h | 695 bool mergedregs; member
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| H A D | ir3.c | 121 if (v->mergedregs) { in collect_reg_info()
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| H A D | ir3_spill.c | 518 ctx->merged_regs = v->mergedregs; in spill_ctx_init()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_program.c | 565 COND(vs->mergedregs, A6XX_SP_VS_CTRL_REG0_MERGEDREGS) |
694 assert(vs->mergedregs == hs->mergedregs);
866 COND(fs->mergedregs, A6XX_SP_FS_CTRL_REG0_MERGEDREGS) |
959 assert(gs->mergedregs == (ds ? ds->mergedregs : vs->mergedregs));
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| H A D | fd6_compute.c | 69 COND(v->mergedregs, A6XX_SP_CS_CTRL_REG0_MERGEDREGS) |
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| /third_party/mesa3d/src/freedreno/computerator/ |
| H A D | a6xx.c | 155 COND(v->mergedregs, A6XX_SP_CS_CTRL_REG0_MERGEDREGS) | in cs_program_emit()
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| H A D | tu_pipeline.c | 490 .mergedregs = xs->mergedregs, in tu6_emit_xs()
519 .mergedregs = xs->mergedregs, in tu6_emit_xs()
533 .mergedregs = xs->mergedregs, in tu6_emit_xs()
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