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Searched refs:kZRegBitsPerPRegBit (Results 1 - 9 of 9) sorted by relevance

/third_party/vixl/test/aarch64/
H A Dtest-utils-aarch64.h192 VIXL_ASSERT(lane < GetSVELaneCount(p_bits_per_lane * kZRegBitsPerPRegBit));
225 VIXL_ASSERT((reg.GetLaneSizeInBits() % kZRegBitsPerPRegBit) == 0); in GetSVELane()
227 reg.GetLaneSizeInBits() / kZRegBitsPerPRegBit, in GetSVELane()
H A Dtest-utils-aarch64.cc392 VIXL_ASSERT((reg.GetLaneSizeInBits() % kZRegBitsPerPRegBit) == 0); in EqualSVELane()
393 unsigned p_bits_per_lane = reg.GetLaneSizeInBits() / kZRegBitsPerPRegBit; in EqualSVELane()
H A Dtest-assembler-sve-aarch64.cc122 int p_bits_per_lane = pd.GetLaneSizeInBits() / kZRegBitsPerPRegBit; in Initialise()
5288 VIXL_ASSERT((vl % kZRegBitsPerPRegBit) == 0);
5289 uint64_t pl = vl / kZRegBitsPerPRegBit;
5446 VIXL_ASSERT((vl % kZRegBitsPerPRegBit) == 0);
5447 uint64_t pl = vl / kZRegBitsPerPRegBit;
5549 VIXL_ASSERT((vl % kZRegBitsPerPRegBit) == 0);
5550 uint64_t pl = vl / kZRegBitsPerPRegBit;
6934 VIXL_ASSERT((vl % kZRegBitsPerPRegBit) == 0);
6935 int pl = vl / kZRegBitsPerPRegBit;
14090 int pl = config->sve_vl_in_bits() / kZRegBitsPerPRegBit;
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H A Dtest-trace-aarch64.cc3032 const int pl_in_bits = vl_in_bits / kZRegBitsPerPRegBit;
/third_party/vixl/src/aarch64/
H A Dinstructions-aarch64.h133 const unsigned kZRegBitsPerPRegBit = kBitsPerByte; member
135 const unsigned kPRegMinSize = kZRegMinSize / kZRegBitsPerPRegBit;
139 const unsigned kPRegMaxSize = kZRegMaxSize / kZRegBitsPerPRegBit;
H A Dmacro-assembler-sve-aarch64.cc204 if ((multiplier % kZRegBitsPerPRegBit) == 0) { in Addpl()
205 Addvl(xd, xn, multiplier / kZRegBitsPerPRegBit); in Addpl()
336 VIXL_ASSERT((kZRegBitsPerPRegBit % vl_divisor) == 0); in CalculateSVEAddress()
337 Addpl(xd, base, offset * (kZRegBitsPerPRegBit / vl_divisor)); in CalculateSVEAddress()
H A Dsimulator-aarch64.h3013 VIXL_ASSERT((GetVectorLengthInBits() % kZRegBitsPerPRegBit) == 0);
3014 return GetVectorLengthInBits() / kZRegBitsPerPRegBit;
3017 VIXL_ASSERT((GetVectorLengthInBytes() % kZRegBitsPerPRegBit) == 0);
3018 return GetVectorLengthInBytes() / kZRegBitsPerPRegBit;
H A Dlogic-aarch64.cc1640 LaneSizeInBitsFromFormat(vform) / kZRegBitsPerPRegBit;
H A Dsimulator-aarch64.cc1683 int print_size_in_bits = kQRegSize / kZRegBitsPerPRegBit; in Simulator()

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