| /third_party/musl/src/ldso/mipsn32/ |
| H A D | dlsym.s | 13 jalr $25
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| /third_party/musl/src/ldso/mips64/ |
| H A D | dlsym.s | 13 jalr $25
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| /third_party/musl/src/ldso/mips/ |
| H A D | dlsym.s | 13 jalr $25
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| /third_party/musl/src/signal/mips/ |
| H A D | sigsetjmp.s | 18 jalr $25
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| /third_party/musl/src/thread/mips/ |
| H A D | clone.s | 32 jalr $25
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| /third_party/musl/src/thread/or1k/ |
| H A D | clone.s | 27 l.jalr r11
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| /third_party/musl/src/signal/mipsn32/ |
| H A D | sigsetjmp.s | 22 jalr $25
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| /third_party/musl/src/signal/mips64/ |
| H A D | sigsetjmp.s | 22 jalr $25
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| /third_party/musl/src/thread/mipsn32/ |
| H A D | clone.s | 30 jalr $25 # call the user's function
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| /third_party/musl/src/thread/mips64/ |
| H A D | clone.s | 30 jalr $25 # call the user's function
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| /third_party/musl/src/thread/riscv64/ |
| H A D | clone.s | 30 jalr a1
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| /third_party/musl/src/thread/riscv32/ |
| H A D | clone.s | 30 jalr a1
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | assembler-riscv64.h | 213 static int BrachlongOffset(Instr auipc, Instr jalr);
390 void jalr(Register rd, Register rs1, int16_t imm12);
1118 void jr(Register rs) { jalr(zero_reg, rs, 0); } in jr()
1119 void jr(Register rs, int32_t imm12) { jalr(zero_reg, rs, imm12); } in jr()
1120 void jalr(Register rs, int32_t imm12) { jalr(ra, rs, imm12); } in jalr() function
1121 void jalr(Register rs) { jalr(ra, rs, 0); } in jalr() function
1122 void ret() { jalr(zero_reg, ra, 0); } in ret()
1125 jalr(r in call()
[all...] |
| H A D | macro-assembler-riscv64.h | 33 // via 'jalr t6' or 'jr t6' instructions. This is relied upon by gcc when
226 jalr(rd, Lo12); // jump PC + Hi20 + Lo12 in GenPCRelativeJumpAndLink()
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| H A D | macro-assembler-riscv64.cc | 3287 jalr(ra, target, 0); in Call()
3291 jalr(ra, target, 0); in Call()
3435 // instruction past the real call into C code (the jalr(t6)), and push it. in StoreReturnAddressAndCall()
3451 jalr(t6); in StoreReturnAddressAndCall()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceAssemblerMIPS32.h | 191 void jalr(const Operand *OpRs, const Operand *OpRd);
|
| H A D | IceInstMIPS32.cpp | 483 "jalr" in emit()
499 Asm->jalr(getCallTarget(), ImplicitRA); in emitIAS()
|
| H A D | IceAssemblerMIPS32.cpp | 654 void AssemblerMIPS32::jalr(const Operand *OpRs, const Operand *OpRd) { in jalr() function in Ice::MIPS32::AssemblerMIPS32
656 const IValueT Rs = encodeGPRegister(OpRs, "Rs", "jalr"); in jalr()
658 (OpRd == nullptr) ? 31 : encodeGPRegister(OpRd, "Rd", "jalr"); in jalr()
|
| /third_party/node/deps/v8/src/diagnostics/mips64/ |
| H A D | disasm-mips64.cc | 1380 Format(instr, "jalr 'rs, 'rd"); in DecodeTypeRegisterSPECIAL()
|
| /third_party/node/deps/v8/src/diagnostics/mips/ |
| H A D | disasm-mips.cc | 1245 Format(instr, "jalr 'rs, 'rd"); in DecodeTypeRegisterSPECIAL()
|
| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | macro-assembler-mips.cc | 3808 jalr(target); in CallRecordWriteStub()
3812 jalr(target); in CallRecordWriteStub()
3841 jalr(target); in CallRecordWriteStub()
3845 jalr(target); in CallRecordWriteStub()
3979 // instruction past the real call into C code (the jalr(t9)), and push it. in CallRecordWriteStub()
3997 jalr(t9); in CallRecordWriteStub()
|
| H A D | assembler-mips.cc | 968 // Correct ra register to point to one instruction after jalr from in target_at_put()
1743 jalr(rs, zero_reg); in jr()
1760 void Assembler::jalr(Register rs, Register rd) { in jalr() function in v8::internal::Assembler
3828 jalr(t); in GenPCRelativeJumpAndLink()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | macro-assembler-mips64.cc | 4342 jalr(target); in CallRecordWriteStub()
4346 jalr(target); in CallRecordWriteStub()
4473 // instruction past the real call into C code (the jalr(t9)), and push it. in CallRecordWriteStub()
4491 jalr(t9); in CallRecordWriteStub()
4560 jalr(t8); in CallRecordWriteStub()
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| H A D | assembler-mips64.h | 176 // trampoline between jalr and delay slot instruction. In the destructor of
484 void jalr(Register rs, Register rd = ra);
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| /third_party/node/deps/v8/src/diagnostics/riscv64/ |
| H A D | disasm-riscv64.cc | 1427 Format(instr, "jalr 'rs1"); in DecodeIType()
1429 Format(instr, "jalr 'rd, 'imm12('rs1)"); in DecodeIType()
1742 Format(instr, "jalr 'Crs1"); in DecodeCRType()
|