Searched refs:divw (Results 1 - 10 of 10) sorted by relevance
| /third_party/node/deps/v8/src/diagnostics/ppc/ |
| H A D | disasm-ppc.cc | 1097 Format(instr, "divw'o'. 'rt, 'ra, 'rb"); in DecodeExt2()
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| /third_party/node/deps/v8/src/codegen/ppc/ |
| H A D | assembler-ppc.h | 900 void divw(Register dst, Register src1, Register src2, OEBit o = LeaveOE,
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| H A D | macro-assembler-ppc.cc | 2794 divw(dst, src, value, s, r); in CallRecordWriteStub()
2835 divw(scratch, src, value); in CallRecordWriteStub()
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| H A D | constants-ppc.h | 2107 V(divw, DIVW, 0x7C0003D6) \
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| H A D | assembler-ppc.cc | 858 void Assembler::divw(Register dst, Register src1, Register src2, OEBit o, in divw() function in v8::internal::Assembler
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| /third_party/mesa3d/src/mesa/x86/ |
| H A D | assyntax.h | 431 #define DIV_W(a) CHOICE(divw a, divw a, div a)
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| /third_party/node/deps/v8/src/compiler/backend/ppc/ |
| H A D | code-generator-ppc.cc | 1458 __ divw(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction()
1484 ASSEMBLE_MODULO(divw, mullw); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | assembler-riscv64.h | 500 void divw(Register rd, Register rs1, Register rs2);
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| H A D | macro-assembler-riscv64.cc | 563 divw(res, rs, rt.rm()); in Div32()
569 divw(res, rs, scratch); in Div32()
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| H A D | assembler-riscv64.cc | 1821 void Assembler::divw(Register rd, Register rs1, Register rs2) { in divw() function in v8::internal::Assembler
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