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Searched refs:TGSI_WRITEMASK_XYZW (Results 1 - 25 of 28) sorted by relevance

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/third_party/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_lowering.c288 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_lrp()
293 reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZW); in transform_lrp()
305 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_lrp()
336 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_frc()
341 reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZW); in transform_frc()
350 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_frc()
382 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_pow()
406 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_pow()
833 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_dotp()
884 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_dotp()
[all...]
H A Dtgsi_util.c193 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_src_usage_mask()
317 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_src_usage_mask()
338 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_src_usage_mask()
358 read_mask = TGSI_WRITEMASK_XYZW; /* assume all channels are read */ in tgsi_util_get_src_usage_mask()
H A Dtgsi_point_sprite.c276 ts->point_size_tmp, TGSI_WRITEMASK_XYZW); in psprite_prolog()
305 TGSI_WRITEMASK_XYZW, in psprite_emit_vertex_inst()
367 TGSI_WRITEMASK_XYZW, in psprite_emit_vertex_inst()
377 TGSI_WRITEMASK_XYZW); in psprite_emit_vertex_inst()
403 dstReg, TGSI_WRITEMASK_XYZW); in psprite_emit_vertex_inst()
H A Dtgsi_ureg.c302 assert(usage_mask <= TGSI_WRITEMASK_XYZW); in ureg_DECL_fs_input_centroid_layout()
352 ureg->nr_input_regs, TGSI_WRITEMASK_XYZW, array_id, array_size); in ureg_DECL_fs_input_centroid()
501 return ureg_DECL_output_masked(ureg, name, index, TGSI_WRITEMASK_XYZW, in ureg_DECL_output()
513 TGSI_WRITEMASK_XYZW, in ureg_DECL_output_array()
1567 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_atomic_2d()
1639 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_temps()
1664 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_range()
1685 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_range2D()
1711 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_sampler_view()
1739 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_image()
[all...]
H A Dtgsi_vpos.c71 0, TGSI_WRITEMASK_XYZW); in write_vpos_prolog()
H A Dtgsi_build.c106 declaration.UsageMask = TGSI_WRITEMASK_XYZW; in tgsi_default_declaration()
979 dst_register.WriteMask = TGSI_WRITEMASK_XYZW; in tgsi_default_dst_register()
1001 assert( mask <= TGSI_WRITEMASK_XYZW ); in tgsi_build_dst_register()
H A Dtgsi_ureg.h1021 dst.WriteMask = TGSI_WRITEMASK_XYZW; in ureg_dst_array_register()
1053 dst.WriteMask = TGSI_WRITEMASK_XYZW; in ureg_dst()
H A Dtgsi_transform.h200 decl.Declaration.UsageMask = TGSI_WRITEMASK_XYZW; in tgsi_transform_sampler_view_decl()
H A Dtgsi_dump.c227 if (writemask != TGSI_WRITEMASK_XYZW) { in _dump_writemask()
H A Dtgsi_text.c478 *writemask = TGSI_WRITEMASK_XYZW; in parse_opt_writemask()
/third_party/mesa3d/src/gallium/drivers/virgl/
H A Dvirgl_tgsi.c168 TGSI_FILE_TEMPORARY, temp->temp, TGSI_WRITEMASK_XYZW, in virgl_mov_input_temp_sint()
180 TGSI_FILE_TEMPORARY, temp->temp, TGSI_WRITEMASK_XYZW, in virgl_mov_input_temp_uint()
328 TGSI_WRITEMASK_XYZW, in virgl_tgsi_transform_instruction()
424 TGSI_FILE_OUTPUT, real_out, TGSI_WRITEMASK_XYZW, in virgl_tgsi_transform_instruction()
/third_party/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_tgsi_info.c143 readmask = TGSI_WRITEMASK_XYZW; in analyse_tex()
150 readmask = TGSI_WRITEMASK_XYZW; in analyse_tex()
236 readmask = TGSI_WRITEMASK_XYZW; in analyse_sample()
H A Dlp_bld_tgsi_aos.c272 if (reg->Register.WriteMask != TGSI_WRITEMASK_XYZW) { in lp_emit_store_aos()
/third_party/mesa3d/src/gallium/drivers/r300/
H A Dr300_vs_draw.c253 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_inst()
265 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_inst()
/third_party/mesa3d/src/gallium/include/pipe/
H A Dp_shader_tokens.h98 #define TGSI_WRITEMASK_XYZW 0x0F macro
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_shaderlib_tgsi.c530 struct ureg_dst coord = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZW); in si_create_fmask_expand_cs()
/third_party/mesa3d/src/gallium/auxiliary/util/
H A Du_pstipple.c345 TGSI_WRITEMASK_XYZW, in pstip_transform_prolog()
H A Du_simple_shaders.c323 if (writemask != TGSI_WRITEMASK_XYZW) { in util_make_fragment_tex_shader_writemask()
375 TGSI_WRITEMASK_XYZW, in util_make_fragment_tex_shader()
/third_party/mesa3d/src/gallium/frontends/nine/
H A Dnine_ff.c672 tmp.WriteMask = TGSI_WRITEMASK_XYZW; in nine_ff_build_vs()
698 tmp.WriteMask = TGSI_WRITEMASK_XYZW; in nine_ff_build_vs()
711 writemask = TGSI_WRITEMASK_XYZW; in nine_ff_build_vs()
1490 dst.WriteMask = TGSI_WRITEMASK_XYZW; in nine_ff_build_ps()
1497 if (dst.WriteMask != TGSI_WRITEMASK_XYZW) { in nine_ff_build_ps()
/third_party/mesa3d/src/gallium/drivers/i915/
H A Di915_fpc_optimize.c605 TGSI_WRITEMASK_XYZW && in i915_fpc_optimize_useless_mov_after_inst()
H A Di915_fpc_translate.c573 TGSI_WRITEMASK_XYZW);/* coord_mask */ in i915_translate_instruction()
/third_party/mesa3d/src/mesa/state_tracker/
H A Dst_pbo.c577 nir_store_var(&b, color, result, TGSI_WRITEMASK_XYZW); in create_fs()
/third_party/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_bld_interp.c719 bld->mask[0] = TGSI_WRITEMASK_XYZW; in lp_build_interp_soa_init()
/third_party/mesa3d/src/gallium/drivers/nouveau/nv50/
H A Dnv50_surface.c958 TGSI_WRITEMASK_XYZW : TGSI_WRITEMASK_X; in nv50_blitter_make_fp()
1012 unsigned mask = TGSI_WRITEMASK_XYZW; in nv50_blitter_make_fp()
/third_party/mesa3d/src/gallium/drivers/svga/
H A Dsvga_tgsi_vgpu10.c2414 reg.Register.WriteMask = TGSI_WRITEMASK_XYZW; in make_dst_reg()
9328 assert(writemask == TGSI_WRITEMASK_XYZW || in check_double_dst_writemask()
10453 needLoad = (writemask == TGSI_WRITEMASK_XYZW) ? FALSE : TRUE; in emit_store_instruction()
10459 writemask == TGSI_WRITEMASK_XYZW)) { in emit_store_instruction()
10486 writemask = TGSI_WRITEMASK_XYZW; in emit_store_instruction()

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