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Help
Searched
refs:NVIC_NS
(Results
1 - 6
of
6
) sorted by relevance
/third_party/cmsis/CMSIS/Core/Include/
H
A
D
core_cm23.h
1265
#define
NVIC_NS
((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
macro
1728
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_EnableIRQ_NS()
1745
return((uint32_t)(((
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetEnableIRQ_NS()
1764
NVIC_NS
->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_DisableIRQ_NS()
1781
return((uint32_t)(((
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetPendingIRQ_NS()
1800
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_SetPendingIRQ_NS()
1815
NVIC_NS
->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_ClearPendingIRQ_NS()
1832
return((uint32_t)(((
NVIC_NS
->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetActive_NS()
1854
NVIC_NS
->IPR[_IP_IDX(IRQn)] = ((uint32_t)(
NVIC_NS
in TZ_NVIC_SetPriority_NS()
[all...]
H
A
D
core_cm35p.h
2082
#define
NVIC_NS
((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
macro
2606
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_EnableIRQ_NS()
2623
return((uint32_t)(((
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetEnableIRQ_NS()
2642
NVIC_NS
->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_DisableIRQ_NS()
2659
return((uint32_t)(((
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetPendingIRQ_NS()
2678
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_SetPendingIRQ_NS()
2693
NVIC_NS
->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_ClearPendingIRQ_NS()
2710
return((uint32_t)(((
NVIC_NS
->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetActive_NS()
2732
NVIC_NS
->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
in TZ_NVIC_SetPriority_NS()
2754
return(((uint32_t)
NVIC_NS
in TZ_NVIC_GetPriority_NS()
[all...]
H
A
D
core_cm33.h
2082
#define
NVIC_NS
((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
macro
2606
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_EnableIRQ_NS()
2623
return((uint32_t)(((
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetEnableIRQ_NS()
2642
NVIC_NS
->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_DisableIRQ_NS()
2659
return((uint32_t)(((
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetPendingIRQ_NS()
2678
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_SetPendingIRQ_NS()
2693
NVIC_NS
->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_ClearPendingIRQ_NS()
2710
return((uint32_t)(((
NVIC_NS
->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetActive_NS()
2732
NVIC_NS
->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
in TZ_NVIC_SetPriority_NS()
2754
return(((uint32_t)
NVIC_NS
in TZ_NVIC_GetPriority_NS()
[all...]
H
A
D
core_starmc1.h
2179
#define
NVIC_NS
((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
macro
2725
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_EnableIRQ_NS()
2742
return((uint32_t)(((
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetEnableIRQ_NS()
2761
NVIC_NS
->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_DisableIRQ_NS()
2778
return((uint32_t)(((
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetPendingIRQ_NS()
2797
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_SetPendingIRQ_NS()
2812
NVIC_NS
->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_ClearPendingIRQ_NS()
2829
return((uint32_t)(((
NVIC_NS
->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetActive_NS()
2851
NVIC_NS
->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
in TZ_NVIC_SetPriority_NS()
2873
return(((uint32_t)
NVIC_NS
in TZ_NVIC_GetPriority_NS()
[all...]
H
A
D
core_cm85.h
3615
#define
NVIC_NS
((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
macro
4139
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_EnableIRQ_NS()
4156
return((uint32_t)(((
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetEnableIRQ_NS()
4175
NVIC_NS
->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_DisableIRQ_NS()
4192
return((uint32_t)(((
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetPendingIRQ_NS()
4211
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_SetPendingIRQ_NS()
4226
NVIC_NS
->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_ClearPendingIRQ_NS()
4243
return((uint32_t)(((
NVIC_NS
->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetActive_NS()
4265
NVIC_NS
->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
in TZ_NVIC_SetPriority_NS()
4287
return(((uint32_t)
NVIC_NS
in TZ_NVIC_GetPriority_NS()
[all...]
H
A
D
core_cm55.h
3591
#define
NVIC_NS
((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
macro
4115
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_EnableIRQ_NS()
4132
return((uint32_t)(((
NVIC_NS
->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetEnableIRQ_NS()
4151
NVIC_NS
->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_DisableIRQ_NS()
4168
return((uint32_t)(((
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetPendingIRQ_NS()
4187
NVIC_NS
->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_SetPendingIRQ_NS()
4202
NVIC_NS
->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
in TZ_NVIC_ClearPendingIRQ_NS()
4219
return((uint32_t)(((
NVIC_NS
->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
in TZ_NVIC_GetActive_NS()
4241
NVIC_NS
->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
in TZ_NVIC_SetPriority_NS()
4263
return(((uint32_t)
NVIC_NS
in TZ_NVIC_GetPriority_NS()
[all...]
Completed in 57 milliseconds