| /third_party/vixl/test/aarch64/ |
| H A D | test-assembler-fp-aarch64.cc | 1725 __ Mrs(x0, NZCV); in TEST()
1729 __ Mrs(x1, NZCV); in TEST()
1733 __ Mrs(x2, NZCV); in TEST()
1737 __ Mrs(x3, NZCV); in TEST()
1741 __ Mrs(x4, NZCV); in TEST()
1745 __ Mrs(x5, NZCV); in TEST()
1749 __ Mrs(x6, NZCV); in TEST()
1753 __ Mrs(x7, NZCV); in TEST()
1760 __ Mrs(x8, NZCV); in TEST()
1766 __ Mrs(x in TEST()
[all...] |
| H A D | test-assembler-aarch64.cc | 5842 __ Mrs(x1, NZCV);
5846 __ Mrs(x2, NZCV);
5850 __ Mrs(x3, NZCV);
5854 __ Mrs(x4, NZCV);
5858 __ Mrs(x5, NZCV);
5887 __ Mrs(x9, NZCV);
5889 __ Mrs(x10, NZCV);
5891 __ Mrs(x11, NZCV);
5893 __ Mrs(x12, NZCV);
5895 __ Mrs(x1
[all...] |
| H A D | test-assembler-sve-aarch64.cc | 1085 __ Mrs(x0, NZCV);
1087 __ Mrs(x1, NZCV);
1143 __ Mrs(x6, NZCV);
1153 __ Mrs(x7, NZCV);
1164 __ Mrs(x8, NZCV);
1167 __ Mrs(x9, NZCV);
1177 __ Mrs(x10, NZCV);
1180 __ Mrs(x11, NZCV);
1240 __ Mrs(x2, NZCV);
1242 __ Mrs(x
[all...] |
| H A D | test-utils-aarch64.cc | 700 __ Mrs(tmp, NZCV); in Dump()
964 __ Mrs(t1, NZCV); in ComputeMachineStateHash()
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| /third_party/vixl/test/aarch32/ |
| H A D | test-simulator-cond-rd-rn-rm-ge-a32.cc | 472 __ Mrs(saved_q_bit, APSR); in TestHelper()
484 __ Mrs(saved_nzcv_bits, APSR); in TestHelper()
506 __ Mrs(nzcv_bits, APSR); in TestHelper()
514 __ Mrs(q_bit, APSR); in TestHelper()
522 __ Mrs(ge_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-rn-rm-ge-t32.cc | 472 __ Mrs(saved_q_bit, APSR); in TestHelper()
484 __ Mrs(saved_nzcv_bits, APSR); in TestHelper()
506 __ Mrs(nzcv_bits, APSR); in TestHelper()
514 __ Mrs(q_bit, APSR); in TestHelper()
522 __ Mrs(ge_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-rn-rm-q-a32.cc | 456 __ Mrs(saved_q_bit, APSR); in TestHelper()
468 __ Mrs(saved_nzcv_bits, APSR); in TestHelper()
490 __ Mrs(nzcv_bits, APSR); in TestHelper()
498 __ Mrs(q_bit, APSR); in TestHelper()
506 __ Mrs(ge_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-rn-rm-q-t32.cc | 456 __ Mrs(saved_q_bit, APSR); in TestHelper()
468 __ Mrs(saved_nzcv_bits, APSR); in TestHelper()
490 __ Mrs(nzcv_bits, APSR); in TestHelper()
498 __ Mrs(q_bit, APSR); in TestHelper()
506 __ Mrs(ge_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-rn-rm-sel-a32.cc | 449 __ Mrs(saved_q_bit, APSR); in TestHelper()
461 __ Mrs(saved_nzcv_bits, APSR); in TestHelper()
483 __ Mrs(nzcv_bits, APSR); in TestHelper()
491 __ Mrs(q_bit, APSR); in TestHelper()
499 __ Mrs(ge_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-rn-rm-sel-t32.cc | 449 __ Mrs(saved_q_bit, APSR); in TestHelper()
461 __ Mrs(saved_nzcv_bits, APSR); in TestHelper()
483 __ Mrs(nzcv_bits, APSR); in TestHelper()
491 __ Mrs(q_bit, APSR); in TestHelper()
499 __ Mrs(ge_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-const-a32.cc | 518 __ Mrs(saved_q_bit, APSR); in TestHelper()
532 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-imm16-t32.cc | 471 __ Mrs(saved_q_bit, APSR); in TestHelper()
485 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-utils-aarch32.cc | 80 __ Mrs(tmp, APSR); in Dump()
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| H A D | test-simulator-cond-rd-operand-const-t32.cc | 633 __ Mrs(saved_q_bit, APSR); in TestHelper()
647 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-rn-a32.cc | 555 __ Mrs(saved_q_bit, APSR); in TestHelper()
570 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-rn-t32.cc | 555 __ Mrs(saved_q_bit, APSR); in TestHelper()
570 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 620 __ Mrs(saved_q_bit, APSR); in TestHelper()
635 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 620 __ Mrs(saved_q_bit, APSR); in TestHelper()
635 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 914 __ Mrs(saved_q_bit, APSR); in TestHelper()
929 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 914 __ Mrs(saved_q_bit, APSR); in TestHelper()
929 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 924 __ Mrs(saved_q_bit, APSR); in TestHelper()
939 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 924 __ Mrs(saved_q_bit, APSR); in TestHelper()
939 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rdlow-operand-imm8-t32.cc | 1623 __ Mrs(saved_q_bit, APSR); in TestHelper()
1637 __ Mrs(nzcv_bits, APSR); in TestHelper()
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| H A D | test-simulator-cond-rd-rn-rm-a32.cc | 1560 __ Mrs(saved_q_bit, APSR); in TestHelper()
1572 __ Mrs(saved_nzcv_bits, APSR); in TestHelper()
1594 __ Mrs(nzcv_bits, APSR); in TestHelper()
1602 __ Mrs(q_bit, APSR); in TestHelper()
1610 __ Mrs(ge_bits, APSR); in TestHelper()
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| /third_party/vixl/benchmarks/aarch64/ |
| H A D | bench-utils.cc | 204 __ Mrs(PickX(), NZCV); in GenerateTrivialSequence()
|