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Searched refs:GetSizeInBits (Results 1 - 13 of 13) sorted by relevance

/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.cc646 VIXL_ASSERT(rd.GetSizeInBits() == rn.GetSizeInBits()); in lslv()
647 VIXL_ASSERT(rd.GetSizeInBits() == rm.GetSizeInBits()); in lslv()
655 VIXL_ASSERT(rd.GetSizeInBits() == rn.GetSizeInBits()); in lsrv()
656 VIXL_ASSERT(rd.GetSizeInBits() == rm.GetSizeInBits()); in lsrv()
664 VIXL_ASSERT(rd.GetSizeInBits() == rn.GetSizeInBits()); in asrv()
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H A Dmacro-assembler-aarch64.cc520 unsigned reg_size = rd.GetSizeInBits(); in Emit()
889 unsigned reg_size = rd.GetSizeInBits(); in Emit()
970 VIXL_ASSERT(operand.GetRegister().GetSizeInBits() <= rd.GetSizeInBits()); in Emit()
1775 int reg_size = dst.GetSizeInBits(); in Emit()
1827 VIXL_ASSERT(dst.GetSizeInBits() == src.GetSizeInBits()); in Emit()
1828 VIXL_ASSERT(dst.GetSizeInBits() <= kXRegSize); in Emit()
1829 int operand_size = static_cast<int>(dst.GetSizeInBits()); in Emit()
1992 VIXL_ASSERT(rd.GetSizeInBits() in Emit()
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H A Dregisters-aarch64.h138 int GetSizeInBits() const { return DecodeSizeInBits(size_); }
394 return GetSizeInBits();
406 return GetSizeInBits();
822 VIXL_ASSERT(GetSizeInBits() == SIZE); \
827 VIXL_CONSTEXPR int GetSizeInBits() const { return SIZE; } \
830 return PARENT::IsValid() && (PARENT::GetSizeInBits() == SIZE); \
H A Doperands-aarch64.h47 size_(reg1.GetSizeInBits()), in CPURegList()
133 VIXL_ASSERT(other.GetSizeInBits() == size_); in Combine()
139 VIXL_ASSERT(other.GetSizeInBits() == size_); in Remove()
991 size_t GetSizeInBits() const { return GetSizeInBytes() * kBitsPerByte; } in GetSizeInBits() function in vixl::aarch64::GenericOperand
H A Dassembler-aarch64.h788 VIXL_ASSERT(lsb + width <= static_cast<unsigned>(rn.GetSizeInBits())); in bfi()
791 (rd.GetSizeInBits() - lsb) & (rd.GetSizeInBits() - 1), in bfi()
801 VIXL_ASSERT(lsb + width <= static_cast<unsigned>(rn.GetSizeInBits())); in bfxil()
814 VIXL_ASSERT(shift < static_cast<unsigned>(rd.GetSizeInBits())); in asr()
815 sbfm(rd, rn, shift, rd.GetSizeInBits() - 1); in asr()
824 VIXL_ASSERT(lsb + width <= static_cast<unsigned>(rn.GetSizeInBits()));
827 (rd.GetSizeInBits() - lsb) & (rd.GetSizeInBits() - 1),
837 VIXL_ASSERT(lsb + width <= static_cast<unsigned>(rn.GetSizeInBits())); in sbfx()
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H A Doperands-aarch64.cc432 VIXL_ASSERT(reg.GetSizeInBits() > static_cast<int>(kXRegSize)); in GenericOperand()
H A Dsimulator-aarch64.h467 unsigned GetSizeInBits() const { return size_in_bytes_ * kBitsPerByte; } in GetSizeInBits() function in vixl::aarch64::SimRegisterBase
655 lane < (static_cast<int>(register_.GetSizeInBits() / chunk_size)); in SetAllBits()
986 return register_.GetSizeInBits() / LaneSizeInBitsFromFormat(vform); in LaneCountFromFormat()
2113 VIXL_ASSERT(operand.GetCPURegister().GetSizeInBits() <= 64);
H A Dassembler-sve-aarch64.cc2220 VIXL_ASSERT(static_cast<unsigned>(rn.GetSizeInBits()) >= in index()
2222 VIXL_ASSERT(static_cast<unsigned>(rm.GetSizeInBits()) >= in index()
2234 VIXL_ASSERT(static_cast<unsigned>(rn.GetSizeInBits()) >= in index()
2246 VIXL_ASSERT(static_cast<unsigned>(rm.GetSizeInBits()) >= in index()
5797 VIXL_ASSERT(static_cast<unsigned>(rn.GetSizeInBits()) >= in cpy()
5812 VIXL_ASSERT(static_cast<unsigned>(vn.GetSizeInBits()) == in cpy()
H A Dmacro-assembler-aarch64.h850 Mov(rd, (rd.GetSizeInBits() == kXRegSize) ? ~imm : (~imm & kWRegMask)); in Mvn()
8732 return AcquireRegisterOfSize(reg.GetSizeInBits()); in AcquireSameSizeAs()
8736 return AcquireVRegisterOfSize(reg.GetSizeInBits()); in AcquireSameSizeAs()
H A Ddisasm-aarch64.cc6124 switch (reg.GetSizeInBits()) { in Disassembler()
H A Dsimulator-aarch64.cc13984 for (unsigned i = 0; i < pn.GetSizeInBits(); i++) { in Simulator()
/third_party/vixl/src/aarch32/
H A Dinstructions-aarch32.h124 int GetSizeInBits() const { return (value_ & kSizeMask) >> kSizeShift; }
126 return (GetType() == kNoRegister) ? 0 : (GetSizeInBits() / 8);
128 bool Is64Bits() const { return GetSizeInBits() == 64; }
129 bool Is128Bits() const { return GetSizeInBits() == 128; }
625 switch (reg.GetSizeInBits()) {
/third_party/vixl/test/aarch64/
H A Dtest-disasm-neon-aarch64.cc297 v, VRegister((v.GetCode() + 1) % 32, v.GetSizeInBits(), v.GetLanes())
299 VLIST2(v), VRegister((v.GetCode() + 2) % 32, v.GetSizeInBits(), v.GetLanes())
301 VLIST3(v), VRegister((v.GetCode() + 3) % 32, v.GetSizeInBits(), v.GetLanes())

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