Searched refs:D12 (Results 1 - 17 of 17) sorted by relevance
| /third_party/typescript/tests/baselines/reference/ |
| H A D | undefinedIsSubtypeOfEverything.js | 86 class D12 extends Base {
266 var D12 = /** @class */ (function (_super) {
267 __extends(D12, _super);
268 function D12() {
271 return D12;
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| /third_party/FreeBSD/lib/msun/ld128/ |
| H A D | s_expl.c | 185 D12 = 2.08767569819738524488686318024854942e-9L, variable
256 x * (D11 + x * (D12 + x * (D13 + in expm1l()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 75 case D15: case D14: case D13: case D12: in isARMArea3Register()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.h | 91 { Hexagon::R25, -36 }, { Hexagon::R24, -40 }, { Hexagon::D12, -40 },
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| H A D | HexagonFrameLowering.cpp | 931 Hexagon::D10, Hexagon::D11, Hexagon::D12, Hexagon::D13, in insertCFIInstructionsAt()
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| H A D | HexagonISelLowering.cpp | 287 .Case("r25:24", Hexagon::D12) in getRegisterByName()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 123 case AArch64::D12: return AArch64::B12; in getBRegFromDReg()
163 case AArch64::B12: return AArch64::D12; in getDRegFromBReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64PBQPRegAlloc.cpp | 118 case AArch64::D12: in isOdd()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AsmBackend.cpp | 674 // D12/D13 pair = 0x00000400,
682 else if (Reg1 == AArch64::D12 && Reg2 == AArch64::D13 &&
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| H A D | AArch64MCTargetDesc.cpp | 175 {codeview::RegisterId::ARM64_D12, AArch64::D12}, in initLLVMToCVRegMapping()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 87 SP::D12, SP::D28, SP::D13, SP::D29,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackend.cpp | 1254 static unsigned FPRCSRegs[] = { ARM::D8, ARM::D10, ARM::D12, ARM::D14 }; in generateCompactUnwindEncoding()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 588 Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15}; in DecodeDoubleRegsRegisterClass()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 152 Sparc::D12, Sparc::D13, Sparc::D14, Sparc::D15,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 336 AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1319 ARM::D12, ARM::D13, ARM::D14, ARM::D15,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3243 case Mips::D12: return Mips::F25; in nextReg()
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