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Searched refs:wrt_reg_dword (Results 1 - 25 of 33) sorted by relevance

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/kernel/linux/linux-5.10/drivers/scsi/qla2xxx/
H A Dqla_dbg.c139 wrt_reg_dword(&reg->hccr, HCCRX_SET_HOST_INT); in qla27xx_dump_mpi_ram()
158 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla27xx_dump_mpi_ram()
165 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla27xx_dump_mpi_ram()
225 wrt_reg_dword(&reg->hccr, HCCRX_SET_HOST_INT); in qla24xx_dump_ram()
241 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla24xx_dump_ram()
248 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla24xx_dump_ram()
302 wrt_reg_dword(&reg->iobase_addr, iobase); in qla24xx_read_window()
313 wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_PAUSE); in qla24xx_pause_risc()
334 wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); in qla24xx_soft_reset()
344 wrt_reg_dword( in qla24xx_soft_reset()
[all...]
H A Dqla_mr.h361 wrt_reg_dword((ha)->cregbase + QLAFX00_HST_TO_HBA_REG, \
365 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_TO_HOST_REG, \
372 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_TO_HOST_REG, \
376 wrt_reg_dword((ha)->cregbase + off, val)
382 wrt_reg_dword((ha)->cregbase + QLAFX00_HST_RST_REG, val)
388 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_ICNTRL_REG, \
393 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_ICNTRL_REG, \
401 wrt_reg_dword((ha)->cregbase + off, val)
H A Dqla_sup.c458 wrt_reg_dword(&reg->flash_addr, addr & ~FARX_DATA_FLAG); in qla24xx_read_flash_dword()
501 wrt_reg_dword(&reg->flash_data, data); in qla24xx_write_flash_dword()
502 wrt_reg_dword(&reg->flash_addr, addr | FARX_DATA_FLAG); in qla24xx_write_flash_dword()
1201 wrt_reg_dword(&reg->ctrl_status, in qla24xx_unprotect_flash()
1244 wrt_reg_dword(&reg->ctrl_status, in qla24xx_protect_flash()
1470 wrt_reg_dword(&reg->ctrl_status, in qla24xx_write_nvram_data()
1494 wrt_reg_dword(&reg->ctrl_status, in qla24xx_write_nvram_data()
1740 wrt_reg_dword(&reg->gpiod, gpio_data); in qla24xx_beacon_blink()
1753 wrt_reg_dword(&reg->gpiod, gpio_data); in qla24xx_beacon_blink()
1889 wrt_reg_dword( in qla24xx_beacon_on()
[all...]
H A Dqla_mr.c119 wrt_reg_dword(optr, *iptr); in qlafx00_mailbox_command()
678 wrt_reg_dword(&reg->req_q_in, 0); in qlafx00_config_rings()
679 wrt_reg_dword(&reg->req_q_out, 0); in qlafx00_config_rings()
681 wrt_reg_dword(&reg->rsp_q_in, 0); in qlafx00_config_rings()
682 wrt_reg_dword(&reg->rsp_q_out, 0); in qlafx00_config_rings()
930 wrt_reg_dword(&reg->aenmailbox0, 0); in qlafx00_init_fw_ready()
1407 wrt_reg_dword((void __force __iomem *)&pkt->signature, in qlafx00_init_response_q_entries()
2759 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index); in qlafx00_process_response_queue()
3154 wrt_reg_dword(req->req_q_in, req->ring_index); in qlafx00_start_scsi()
H A Dqla_isr.c3571 wrt_reg_dword(&reg->rsp_q_out[0], rsp->ring_index); in qla24xx_process_response_queue()
3573 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index); in qla24xx_process_response_queue()
3590 wrt_reg_dword(&reg->iobase_addr, 0x7C00); in qla2xxx_check_risc_status()
3592 wrt_reg_dword(&reg->iobase_window, 0x0001); in qla2xxx_check_risc_status()
3596 wrt_reg_dword(&reg->iobase_window, 0x0001); in qla2xxx_check_risc_status()
3605 wrt_reg_dword(&reg->iobase_window, 0x0003); in qla2xxx_check_risc_status()
3609 wrt_reg_dword(&reg->iobase_window, 0x0003); in qla2xxx_check_risc_status()
3623 wrt_reg_dword(&reg->iobase_window, 0x0000); in qla2xxx_check_risc_status()
3722 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla24xx_intr_handler()
3762 wrt_reg_dword( in qla24xx_msix_rsp_q()
[all...]
H A Dqla_iocb.c474 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2x00_start_iocbs()
476 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2x00_start_iocbs()
479 wrt_reg_dword(&reg->ispfx00.req_q_in, req->ring_index); in qla2x00_start_iocbs()
483 wrt_reg_dword(&reg->isp24.req_q_in, req->ring_index); in qla2x00_start_iocbs()
1715 wrt_reg_dword(req->req_q_in, req->ring_index); in qla24xx_start_scsi()
1910 wrt_reg_dword(req->req_q_in, req->ring_index); in qla24xx_dif_start_scsi()
2061 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2xxx_start_scsi_mq()
2270 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2xxx_dif_start_scsi_mq()
2369 wrt_reg_dword((__le32 __force __iomem *)&pkt->handle, handle); in __qla2x00_alloc_iocbs()
3566 wrt_reg_dword(h in qla82xx_start_scsi()
[all...]
H A Dqla_nx.c898 wrt_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32()
905 wrt_reg_dword(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32()
1749 wrt_reg_dword(&reg->req_q_out[0], 0); in qla82xx_config_rings()
1750 wrt_reg_dword(&reg->rsp_q_in[0], 0); in qla82xx_config_rings()
1751 wrt_reg_dword(&reg->rsp_q_out[0], 0); in qla82xx_config_rings()
2056 wrt_reg_dword(&reg->host_int, 0); in qla82xx_intr_handler()
2125 wrt_reg_dword(&reg->host_int, 0); in qla82xx_msix_default()
2159 wrt_reg_dword(&reg->host_int, 0); in qla82xx_msix_rsp_q()
2219 wrt_reg_dword(&reg->host_int, 0); in qla82xx_poll()
2777 wrt_reg_dword(h in qla82xx_start_iocbs()
[all...]
H A Dqla_init.c2857 wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); in qla24xx_reset_risc()
2874 wrt_reg_dword(&reg->ctrl_status, in qla24xx_reset_risc()
2934 wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET); in qla24xx_reset_risc()
2937 wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE); in qla24xx_reset_risc()
2940 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_RESET); in qla24xx_reset_risc()
2977 wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET); in qla25xx_read_risc_sema_reg()
2986 wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET); in qla25xx_write_risc_sema_reg()
2987 wrt_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); in qla25xx_write_risc_sema_reg()
3003 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); in qla25xx_manipulate_risc_semaphore()
4222 wrt_reg_dword( in qla24xx_config_rings()
[all...]
H A Dqla_inline.h369 wrt_reg_dword(req->req_q_in, req->ring_index); in qla_83xx_start_iocbs()
H A Dqla_mbx.c264 wrt_reg_dword(&reg->isp82.hint, HINT_MBX_INT_PENDING); in qla2x00_mailbox_command()
266 wrt_reg_dword(&reg->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command()
318 wrt_reg_dword(&reg->isp82.hint, HINT_MBX_INT_PENDING); in qla2x00_mailbox_command()
320 wrt_reg_dword(&reg->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command()
4481 wrt_reg_dword(req->req_q_in, 0); in qla25xx_init_req_que()
4483 wrt_reg_dword(req->req_q_out, 0); in qla25xx_init_req_que()
4552 wrt_reg_dword(rsp->rsp_q_out, 0); in qla25xx_init_rsp_que()
4554 wrt_reg_dword(rsp->rsp_q_in, 0); in qla25xx_init_rsp_que()
5441 wrt_reg_dword(&reg->hccr, HCCRX_SET_HOST_INT); in qla81xx_write_mpi_register()
5455 wrt_reg_dword( in qla81xx_write_mpi_register()
[all...]
H A Dqla_nvme.c542 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2x00_start_nvme_mq()
H A Dqla_tmpl.c101 wrt_reg_dword(window, data); in qla27xx_write_reg()
H A Dqla_target.c6801 wrt_reg_dword(ISP_ATIO_Q_OUT(vha), ha->tgt.atio_ring_index); in qlt_24xx_process_atio_queue()
6814 wrt_reg_dword(ISP_ATIO_Q_IN(vha), 0); in qlt_24xx_config_rings()
6815 wrt_reg_dword(ISP_ATIO_Q_OUT(vha), 0); in qlt_24xx_config_rings()
/kernel/linux/linux-6.6/drivers/scsi/qla2xxx/
H A Dqla_dbg.c138 wrt_reg_dword(&reg->hccr, HCCRX_SET_HOST_INT); in qla27xx_dump_mpi_ram()
157 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla27xx_dump_mpi_ram()
164 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla27xx_dump_mpi_ram()
224 wrt_reg_dword(&reg->hccr, HCCRX_SET_HOST_INT); in qla24xx_dump_ram()
240 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla24xx_dump_ram()
247 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla24xx_dump_ram()
301 wrt_reg_dword(&reg->iobase_addr, iobase); in qla24xx_read_window()
312 wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_PAUSE); in qla24xx_pause_risc()
333 wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); in qla24xx_soft_reset()
343 wrt_reg_dword( in qla24xx_soft_reset()
[all...]
H A Dqla_mr.h365 wrt_reg_dword((ha)->cregbase + QLAFX00_HST_TO_HBA_REG, \
369 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_TO_HOST_REG, \
376 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_TO_HOST_REG, \
380 wrt_reg_dword((ha)->cregbase + off, val)
386 wrt_reg_dword((ha)->cregbase + QLAFX00_HST_RST_REG, val)
392 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_ICNTRL_REG, \
397 wrt_reg_dword((ha)->cregbase + QLAFX00_HBA_ICNTRL_REG, \
405 wrt_reg_dword((ha)->cregbase + off, val)
H A Dqla_sup.c458 wrt_reg_dword(&reg->flash_addr, addr & ~FARX_DATA_FLAG); in qla24xx_read_flash_dword()
501 wrt_reg_dword(&reg->flash_data, data); in qla24xx_write_flash_dword()
502 wrt_reg_dword(&reg->flash_addr, addr | FARX_DATA_FLAG); in qla24xx_write_flash_dword()
1201 wrt_reg_dword(&reg->ctrl_status, in qla24xx_unprotect_flash()
1244 wrt_reg_dword(&reg->ctrl_status, in qla24xx_protect_flash()
1470 wrt_reg_dword(&reg->ctrl_status, in qla24xx_write_nvram_data()
1494 wrt_reg_dword(&reg->ctrl_status, in qla24xx_write_nvram_data()
1740 wrt_reg_dword(&reg->gpiod, gpio_data); in qla24xx_beacon_blink()
1753 wrt_reg_dword(&reg->gpiod, gpio_data); in qla24xx_beacon_blink()
1889 wrt_reg_dword( in qla24xx_beacon_on()
[all...]
H A Dqla_mr.c119 wrt_reg_dword(optr, *iptr); in qlafx00_mailbox_command()
678 wrt_reg_dword(&reg->req_q_in, 0); in qlafx00_config_rings()
679 wrt_reg_dword(&reg->req_q_out, 0); in qlafx00_config_rings()
681 wrt_reg_dword(&reg->rsp_q_in, 0); in qlafx00_config_rings()
682 wrt_reg_dword(&reg->rsp_q_out, 0); in qlafx00_config_rings()
930 wrt_reg_dword(&reg->aenmailbox0, 0); in qlafx00_init_fw_ready()
1407 wrt_reg_dword((void __force __iomem *)&pkt->signature, in qlafx00_init_response_q_entries()
2760 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index); in qlafx00_process_response_queue()
3155 wrt_reg_dword(req->req_q_in, req->ring_index); in qlafx00_start_scsi()
H A Dqla_iocb.c477 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2x00_start_iocbs()
479 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2x00_start_iocbs()
482 wrt_reg_dword(&reg->ispfx00.req_q_in, req->ring_index); in qla2x00_start_iocbs()
486 wrt_reg_dword(&reg->isp24.req_q_in, req->ring_index); in qla2x00_start_iocbs()
1668 wrt_reg_dword(req->req_q_in, req->ring_index); in qla24xx_start_scsi()
1872 wrt_reg_dword(req->req_q_in, req->ring_index); in qla24xx_dif_start_scsi()
2035 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2xxx_start_scsi_mq()
2253 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2xxx_dif_start_scsi_mq()
2352 wrt_reg_dword((__le32 __force __iomem *)&pkt->handle, handle); in __qla2x00_alloc_iocbs()
3637 wrt_reg_dword(h in qla82xx_start_scsi()
[all...]
H A Dqla_isr.c4162 wrt_reg_dword(&reg->rsp_q_out[0], rsp->ring_index); in qla24xx_process_response_queue()
4164 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index); in qla24xx_process_response_queue()
4181 wrt_reg_dword(&reg->iobase_addr, 0x7C00); in qla2xxx_check_risc_status()
4183 wrt_reg_dword(&reg->iobase_window, 0x0001); in qla2xxx_check_risc_status()
4187 wrt_reg_dword(&reg->iobase_window, 0x0001); in qla2xxx_check_risc_status()
4196 wrt_reg_dword(&reg->iobase_window, 0x0003); in qla2xxx_check_risc_status()
4200 wrt_reg_dword(&reg->iobase_window, 0x0003); in qla2xxx_check_risc_status()
4214 wrt_reg_dword(&reg->iobase_window, 0x0000); in qla2xxx_check_risc_status()
4313 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT); in qla24xx_intr_handler()
4353 wrt_reg_dword( in qla24xx_msix_rsp_q()
[all...]
H A Dqla_nx.c895 wrt_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32()
902 wrt_reg_dword(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32()
1746 wrt_reg_dword(&reg->req_q_out[0], 0); in qla82xx_config_rings()
1747 wrt_reg_dword(&reg->rsp_q_in[0], 0); in qla82xx_config_rings()
1748 wrt_reg_dword(&reg->rsp_q_out[0], 0); in qla82xx_config_rings()
2053 wrt_reg_dword(&reg->host_int, 0); in qla82xx_intr_handler()
2122 wrt_reg_dword(&reg->host_int, 0); in qla82xx_msix_default()
2156 wrt_reg_dword(&reg->host_int, 0); in qla82xx_msix_rsp_q()
2214 wrt_reg_dword(&reg->host_int, 0); in qla82xx_poll()
2772 wrt_reg_dword(h in qla82xx_start_iocbs()
[all...]
H A Dqla_init.c3286 wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); in qla24xx_reset_risc()
3303 wrt_reg_dword(&reg->ctrl_status, in qla24xx_reset_risc()
3363 wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET); in qla24xx_reset_risc()
3366 wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE); in qla24xx_reset_risc()
3369 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_RESET); in qla24xx_reset_risc()
3415 wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET); in qla25xx_read_risc_sema_reg()
3424 wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET); in qla25xx_write_risc_sema_reg()
3425 wrt_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); in qla25xx_write_risc_sema_reg()
3441 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); in qla25xx_manipulate_risc_semaphore()
4706 wrt_reg_dword( in qla24xx_config_rings()
[all...]
H A Dqla_inline.h369 wrt_reg_dword(req->req_q_in, req->ring_index); in qla_83xx_start_iocbs()
H A Dqla_mbx.c268 wrt_reg_dword(&reg->isp82.hint, HINT_MBX_INT_PENDING); in qla2x00_mailbox_command()
270 wrt_reg_dword(&reg->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command()
327 wrt_reg_dword(&reg->isp82.hint, HINT_MBX_INT_PENDING); in qla2x00_mailbox_command()
329 wrt_reg_dword(&reg->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command()
4553 wrt_reg_dword(req->req_q_in, 0); in qla25xx_init_req_que()
4555 wrt_reg_dword(req->req_q_out, 0); in qla25xx_init_req_que()
4624 wrt_reg_dword(rsp->rsp_q_out, 0); in qla25xx_init_rsp_que()
4626 wrt_reg_dword(rsp->rsp_q_in, 0); in qla25xx_init_rsp_que()
5524 wrt_reg_dword(&reg->hccr, HCCRX_SET_HOST_INT); in qla81xx_write_mpi_register()
5538 wrt_reg_dword( in qla81xx_write_mpi_register()
[all...]
H A Dqla_nvme.c745 wrt_reg_dword(req->req_q_in, req->ring_index); in qla2x00_start_nvme_mq()
H A Dqla_tmpl.c101 wrt_reg_dword(window, data); in qla27xx_write_reg()

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