Home
last modified time | relevance | path

Searched refs:smc_state (Results 1 - 14 of 14) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dni_dpm.c2299 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_smc_sp()
2306 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in ni_populate_smc_sp()
2308 smc_state->levels[ps->performance_level_count - 1].bSP = in ni_populate_smc_sp()
2395 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_smc_t()
2410 smc_state->levels[0].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2414 smc_state->levels[0].aT = cpu_to_be32(0); in ni_populate_smc_t()
2439 a_t = be32_to_cpu(smc_state->levels[i].aT) & ~CG_R_MASK; in ni_populate_smc_t()
2441 smc_state->levels[i].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2447 smc_state->levels[i + 1].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2455 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_power_containment_values()
2297 ni_populate_smc_sp(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_populate_smc_sp() argument
2393 ni_populate_smc_t(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_populate_smc_t() argument
2453 ni_populate_power_containment_values(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_populate_power_containment_values() argument
2539 ni_populate_sq_ramping_values(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_populate_sq_ramping_values() argument
2627 ni_convert_power_state_to_smc(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_convert_power_state_to_smc() argument
2692 NISLANDS_SMC_SWSTATE *smc_state; ni_upload_sw_state() local
[all...]
H A Dcypress_dpm.c769 RV770_SMC_SWSTATE *smc_state) in cypress_convert_power_state_to_smc()
776 smc_state->flags |= PPSMC_SWSTATE_FLAG_DC; in cypress_convert_power_state_to_smc()
780 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
787 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
794 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
799 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
800 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()
801 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()
804 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
805 smc_state in cypress_convert_power_state_to_smc()
767 cypress_convert_power_state_to_smc(struct radeon_device *rdev, struct radeon_ps *radeon_state, RV770_SMC_SWSTATE *smc_state) cypress_convert_power_state_to_smc() argument
[all...]
H A Drv770_dpm.c257 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_t()
289 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
295 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
303 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_sp()
309 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
311 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
675 RV770_SMC_SWSTATE *smc_state) in rv770_convert_power_state_to_smc()
681 smc_state->flags |= PPSMC_SWSTATE_FLAG_DC; in rv770_convert_power_state_to_smc()
685 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
692 &smc_state in rv770_convert_power_state_to_smc()
255 rv770_populate_smc_t(struct radeon_device *rdev, struct radeon_ps *radeon_state, RV770_SMC_SWSTATE *smc_state) rv770_populate_smc_t() argument
301 rv770_populate_smc_sp(struct radeon_device *rdev, struct radeon_ps *radeon_state, RV770_SMC_SWSTATE *smc_state) rv770_populate_smc_sp() argument
673 rv770_convert_power_state_to_smc(struct radeon_device *rdev, struct radeon_ps *radeon_state, RV770_SMC_SWSTATE *smc_state) rv770_convert_power_state_to_smc() argument
[all...]
H A Dsi_dpm.c2271 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_power_containment_values()
2294 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()
2299 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2300 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()
2301 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()
2302 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()
2303 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()
2353 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
2354 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()
2355 smc_state in si_populate_power_containment_values()
2269 si_populate_power_containment_values(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_power_containment_values() argument
2363 si_populate_sq_ramping_values(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_sq_ramping_values() argument
4944 si_populate_smc_sp(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_smc_sp() argument
5068 si_populate_smc_t(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_smc_t() argument
5171 si_convert_power_state_to_smc(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_convert_power_state_to_smc() argument
5262 SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.driverState; si_upload_sw_state() local
5285 SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.ULVState; si_upload_ulv_state() local
[all...]
H A Drv770_dpm.h231 RV770_SMC_SWSTATE *smc_state);
234 RV770_SMC_SWSTATE *smc_state);
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dni_dpm.c2300 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_smc_sp()
2307 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in ni_populate_smc_sp()
2309 smc_state->levels[ps->performance_level_count - 1].bSP = in ni_populate_smc_sp()
2396 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_smc_t()
2411 smc_state->levels[0].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2415 smc_state->levels[0].aT = cpu_to_be32(0); in ni_populate_smc_t()
2440 a_t = be32_to_cpu(smc_state->levels[i].aT) & ~CG_R_MASK; in ni_populate_smc_t()
2442 smc_state->levels[i].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2448 smc_state->levels[i + 1].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2456 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_power_containment_values()
2298 ni_populate_smc_sp(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_populate_smc_sp() argument
2394 ni_populate_smc_t(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_populate_smc_t() argument
2454 ni_populate_power_containment_values(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_populate_power_containment_values() argument
2540 ni_populate_sq_ramping_values(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_populate_sq_ramping_values() argument
2628 ni_convert_power_state_to_smc(struct radeon_device *rdev, struct radeon_ps *radeon_state, NISLANDS_SMC_SWSTATE *smc_state) ni_convert_power_state_to_smc() argument
2693 NISLANDS_SMC_SWSTATE *smc_state; ni_upload_sw_state() local
[all...]
H A Dcypress_dpm.c767 RV770_SMC_SWSTATE *smc_state) in cypress_convert_power_state_to_smc()
774 smc_state->flags |= PPSMC_SWSTATE_FLAG_DC; in cypress_convert_power_state_to_smc()
778 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
785 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
792 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
797 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
798 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()
799 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()
802 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
803 smc_state in cypress_convert_power_state_to_smc()
765 cypress_convert_power_state_to_smc(struct radeon_device *rdev, struct radeon_ps *radeon_state, RV770_SMC_SWSTATE *smc_state) cypress_convert_power_state_to_smc() argument
[all...]
H A Drv770_dpm.c259 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_t()
291 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
297 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
305 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_sp()
311 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
313 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
677 RV770_SMC_SWSTATE *smc_state) in rv770_convert_power_state_to_smc()
683 smc_state->flags |= PPSMC_SWSTATE_FLAG_DC; in rv770_convert_power_state_to_smc()
687 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
694 &smc_state in rv770_convert_power_state_to_smc()
257 rv770_populate_smc_t(struct radeon_device *rdev, struct radeon_ps *radeon_state, RV770_SMC_SWSTATE *smc_state) rv770_populate_smc_t() argument
303 rv770_populate_smc_sp(struct radeon_device *rdev, struct radeon_ps *radeon_state, RV770_SMC_SWSTATE *smc_state) rv770_populate_smc_sp() argument
675 rv770_convert_power_state_to_smc(struct radeon_device *rdev, struct radeon_ps *radeon_state, RV770_SMC_SWSTATE *smc_state) rv770_convert_power_state_to_smc() argument
[all...]
H A Dsi_dpm.c2268 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_power_containment_values()
2291 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()
2296 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2297 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()
2298 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()
2299 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()
2300 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()
2350 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
2351 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()
2352 smc_state in si_populate_power_containment_values()
2266 si_populate_power_containment_values(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_power_containment_values() argument
2360 si_populate_sq_ramping_values(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_sq_ramping_values() argument
4943 si_populate_smc_sp(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_smc_sp() argument
5067 si_populate_smc_t(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_smc_t() argument
5170 si_convert_power_state_to_smc(struct radeon_device *rdev, struct radeon_ps *radeon_state, SISLANDS_SMC_SWSTATE *smc_state) si_convert_power_state_to_smc() argument
5258 SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.driverState; si_upload_sw_state() local
5283 struct SISLANDS_SMC_SWSTATE_SINGLE *smc_state = &si_pi->smc_statetable.ULVState; si_upload_ulv_state() local
[all...]
H A Drv770_dpm.h231 RV770_SMC_SWSTATE *smc_state);
234 RV770_SMC_SWSTATE *smc_state);
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c2382 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_power_containment_values()
2405 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()
2410 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2411 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()
2412 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()
2413 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()
2414 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()
2463 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
2464 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()
2465 smc_state in si_populate_power_containment_values()
2380 si_populate_power_containment_values(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_power_containment_values() argument
2473 si_populate_sq_ramping_values(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_sq_ramping_values() argument
5445 si_populate_smc_sp(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_smc_sp() argument
5569 si_populate_smc_t(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_smc_t() argument
5672 si_convert_power_state_to_smc(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_convert_power_state_to_smc() argument
5760 SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.driverState; si_upload_sw_state() local
5782 struct SISLANDS_SMC_SWSTATE_SINGLE *smc_state = &si_pi->smc_statetable.ULVState; si_upload_ulv_state() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/
H A Dsi_dpm.c2367 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_power_containment_values()
2390 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()
2395 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2396 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()
2397 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()
2398 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()
2399 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()
2448 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
2449 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()
2450 smc_state in si_populate_power_containment_values()
2365 si_populate_power_containment_values(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_power_containment_values() argument
2458 si_populate_sq_ramping_values(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_sq_ramping_values() argument
5403 si_populate_smc_sp(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_smc_sp() argument
5527 si_populate_smc_t(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_populate_smc_t() argument
5630 si_convert_power_state_to_smc(struct amdgpu_device *adev, struct amdgpu_ps *amdgpu_state, SISLANDS_SMC_SWSTATE *smc_state) si_convert_power_state_to_smc() argument
5721 SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.driverState; si_upload_sw_state() local
5742 SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.ULVState; si_upload_ulv_state() local
[all...]
/kernel/linux/linux-5.10/net/smc/
H A Dsmc.h42 enum smc_state { /* possible states of an SMC socket */ enum
/kernel/linux/linux-6.6/net/smc/
H A Dsmc.h44 enum smc_state { /* possible states of an SMC socket */ enum

Completed in 40 milliseconds