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Searched refs:slcr (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/reset/
H A Dreset-zynq.c21 struct regmap *slcr; member
40 return regmap_update_bits(priv->slcr, in zynq_reset_assert()
57 return regmap_update_bits(priv->slcr, in zynq_reset_deassert()
76 ret = regmap_read(priv->slcr, priv->offset + (bank * 4), &reg); in zynq_reset_status()
99 priv->slcr = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in zynq_reset_probe()
101 if (IS_ERR(priv->slcr)) { in zynq_reset_probe()
102 dev_err(&pdev->dev, "unable to get zynq-slcr regmap"); in zynq_reset_probe()
103 return PTR_ERR(priv->slcr); in zynq_reset_probe()
/kernel/linux/linux-6.6/drivers/reset/
H A Dreset-zynq.c21 struct regmap *slcr; member
40 return regmap_update_bits(priv->slcr, in zynq_reset_assert()
57 return regmap_update_bits(priv->slcr, in zynq_reset_deassert()
76 ret = regmap_read(priv->slcr, priv->offset + (bank * 4), &reg); in zynq_reset_status()
98 priv->slcr = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in zynq_reset_probe()
100 if (IS_ERR(priv->slcr)) { in zynq_reset_probe()
101 dev_err(&pdev->dev, "unable to get zynq-slcr regmap"); in zynq_reset_probe()
102 return PTR_ERR(priv->slcr); in zynq_reset_probe()
/kernel/linux/linux-5.10/drivers/fpga/
H A Dzynq-fpga.c127 struct regmap *slcr; member
286 regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET, in zynq_fpga_ops_write_init()
290 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_init()
293 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_init()
513 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_complete()
517 regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET, in zynq_fpga_ops_write_complete()
571 priv->slcr = syscon_regmap_lookup_by_phandle(dev->of_node, in zynq_fpga_probe()
573 if (IS_ERR(priv->slcr)) { in zynq_fpga_probe()
574 dev_err(dev, "unable to get zynq-slcr regmap\n"); in zynq_fpga_probe()
575 return PTR_ERR(priv->slcr); in zynq_fpga_probe()
[all...]
/kernel/linux/linux-6.6/drivers/fpga/
H A Dzynq-fpga.c127 struct regmap *slcr; member
286 regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET, in zynq_fpga_ops_write_init()
290 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_init()
293 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_init()
513 regmap_write(priv->slcr, SLCR_LVL_SHFTR_EN_OFFSET, in zynq_fpga_ops_write_complete()
517 regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET, in zynq_fpga_ops_write_complete()
569 priv->slcr = syscon_regmap_lookup_by_phandle(dev->of_node, in zynq_fpga_probe()
571 if (IS_ERR(priv->slcr)) { in zynq_fpga_probe()
572 dev_err(dev, "unable to get zynq-slcr regmap\n"); in zynq_fpga_probe()
573 return PTR_ERR(priv->slcr); in zynq_fpga_probe()
[all...]
/kernel/linux/linux-5.10/drivers/clk/zynq/
H A Dclkc.c584 struct device_node *slcr; in zynq_clock_init() local
598 slcr = of_get_parent(np); in zynq_clock_init()
600 if (slcr->data) { in zynq_clock_init()
601 zynq_clkc_base = (__force void __iomem *)slcr->data + res.start; in zynq_clock_init()
604 of_node_put(slcr); in zynq_clock_init()
610 of_node_put(slcr); in zynq_clock_init()
/kernel/linux/linux-6.6/drivers/clk/zynq/
H A Dclkc.c580 struct device_node *slcr; in zynq_clock_init() local
594 slcr = of_get_parent(np); in zynq_clock_init()
596 if (slcr->data) { in zynq_clock_init()
597 zynq_clkc_base = (__force void __iomem *)slcr->data + res.start; in zynq_clock_init()
600 of_node_put(slcr); in zynq_clock_init()
606 of_node_put(slcr); in zynq_clock_init()
/kernel/linux/linux-5.10/arch/arm/mach-zynq/
H A DMakefile7 obj-y := common.o slcr.o pm.o
/kernel/linux/linux-6.6/arch/arm/mach-zynq/
H A DMakefile7 obj-y := common.o slcr.o pm.o
/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlxsw/
H A Dreg.h1347 MLXSW_REG_DEFINE(slcr, MLXSW_REG_SLCR_ID, MLXSW_REG_SLCR_LEN);
1361 MLXSW_ITEM32(reg, slcr, pp, 0x00, 24, 1);
1370 MLXSW_ITEM32(reg, slcr, local_port, 0x00, 16, 8);
1382 MLXSW_ITEM32(reg, slcr, type, 0x00, 0, 4);
1442 MLXSW_ITEM32(reg, slcr, lag_hash, 0x04, 0, 20);
1448 MLXSW_ITEM32(reg, slcr, seed, 0x08, 0, 32);
1452 MLXSW_REG_ZERO(slcr, payload); in mlxsw_reg_slcr_pack()
11127 MLXSW_REG(slcr),
H A Dspectrum.c2439 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl); in mlxsw_sp_lag_init()
/kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlxsw/
H A Dreg.h1299 MLXSW_REG_DEFINE(slcr, MLXSW_REG_SLCR_ID, MLXSW_REG_SLCR_LEN);
1313 MLXSW_ITEM32(reg, slcr, pp, 0x00, 24, 1);
1322 MLXSW_ITEM32_LP(reg, slcr, 0x00, 16, 0x00, 12);
1334 MLXSW_ITEM32(reg, slcr, type, 0x00, 0, 4);
1394 MLXSW_ITEM32(reg, slcr, lag_hash, 0x04, 0, 20);
1400 MLXSW_ITEM32(reg, slcr, seed, 0x08, 0, 32);
1404 MLXSW_REG_ZERO(slcr, payload); in mlxsw_reg_slcr_pack()
12927 MLXSW_REG(slcr),
H A Dspectrum.c2715 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl); in mlxsw_sp_lag_init()

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