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Searched refs:sdh_parent_names (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-6.6/drivers/clk/mmp/
H A Dclk-of-pxa168.c221 static const char * const sdh_parent_names[] = {"pll1_13", "pll1_12", "pll1_8"}; variable
234 {0, "sdh0_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH0, 6, 2, 0, &sdh0_lock},
235 {0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 2, 0, &sdh1_lock},
236 {0, "sdh2_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH2, 6, 2, 0, &sdh2_lock},
237 {0, "sdh3_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH3, 6, 2, 0, &sdh3_lock},
H A Dclk-of-pxa910.c183 static const char *sdh_parent_names[] = {"pll1_12", "pll1_13"}; variable
195 {0, "sdh0_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH0, 6, 1, 0, &sdh0_lock},
196 {0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
H A Dclk-of-pxa1928.c146 static const char *sdh_parent_names[] = {"pll1_624", "pll5p", "pll5", "pll1_416"}; variable
151 {0, "sdh_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, PXA1928_CLK_SDH0 * 4, 8, 2, 0, &sdh0_lock},
H A Dclk-of-mmp2.c300 static const char * const sdh_parent_names[] = {"pll1_4", "pll2", "usb_pll", "pll1"}; variable
401 clk = mmp_clk_register_mix(NULL, "sdh_mix_clk", sdh_parent_names, in mmp2_axi_periph_clk_init()
402 ARRAY_SIZE(sdh_parent_names), in mmp2_axi_periph_clk_init()
/kernel/linux/linux-5.10/drivers/clk/mmp/
H A Dclk-of-pxa168.c178 static const char *sdh_parent_names[] = {"pll1_12", "pll1_13"}; variable
190 {0, "sdh0_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH0, 6, 1, 0, &sdh0_lock},
191 {0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
H A Dclk-of-pxa910.c184 static const char *sdh_parent_names[] = {"pll1_12", "pll1_13"}; variable
196 {0, "sdh0_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH0, 6, 1, 0, &sdh0_lock},
197 {0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
H A Dclk-of-pxa1928.c146 static const char *sdh_parent_names[] = {"pll1_624", "pll5p", "pll5", "pll1_416"}; variable
151 {0, "sdh_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, PXA1928_CLK_SDH0 * 4, 8, 2, 0, &sdh0_lock},
H A Dclk-of-mmp2.c301 static const char * const sdh_parent_names[] = {"pll1_4", "pll2", "usb_pll", "pll1"}; variable
402 clk = mmp_clk_register_mix(NULL, "sdh_mix_clk", sdh_parent_names, in mmp2_axi_periph_clk_init()
403 ARRAY_SIZE(sdh_parent_names), in mmp2_axi_periph_clk_init()

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