| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| H A D | prminst44xx.c | 100 u16 rstctrl_offs) in omap4_prminst_is_hardreset_asserted()
104 v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs); in omap4_prminst_is_hardreset_asserted()
124 u16 rstctrl_offs) in omap4_prminst_assert_hardreset()
128 omap4_prminst_rmw_inst_reg_bits(mask, mask, part, inst, rstctrl_offs); in omap4_prminst_assert_hardreset()
140 * @rstctrl_offs: reset register offset
153 u16 rstctrl_offs, u16 rstst_offs) in omap4_prminst_deassert_hardreset()
161 rstctrl_offs) == 0) in omap4_prminst_deassert_hardreset()
168 omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs); in omap4_prminst_deassert_hardreset()
99 omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, u16 rstctrl_offs) omap4_prminst_is_hardreset_asserted() argument
123 omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, u16 rstctrl_offs) omap4_prminst_assert_hardreset() argument
152 omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst, u16 rstctrl_offs, u16 rstst_offs) omap4_prminst_deassert_hardreset() argument
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| H A D | prminst44xx.h | 28 u16 rstctrl_offs);
30 u16 rstctrl_offs);
32 s16 inst, u16 rstctrl_offs,
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| H A D | prm33xx.c | 61 * @rstctrl_offs: RM_RSTCTRL register address offset for this module
68 u16 rstctrl_offs) in am33xx_prm_is_hardreset_asserted()
72 v = am33xx_prm_read_reg(inst, rstctrl_offs); in am33xx_prm_is_hardreset_asserted()
94 u16 rstctrl_offs) in am33xx_prm_assert_hardreset()
98 am33xx_prm_rmw_reg_bits(mask, mask, inst, rstctrl_offs); in am33xx_prm_assert_hardreset()
123 s16 inst, u16 rstctrl_offs, in am33xx_prm_deassert_hardreset()
130 if (am33xx_prm_is_hardreset_asserted(shift, 0, inst, rstctrl_offs) == 0) in am33xx_prm_deassert_hardreset()
139 am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs); in am33xx_prm_deassert_hardreset()
67 am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst, u16 rstctrl_offs) am33xx_prm_is_hardreset_asserted() argument
93 am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst, u16 rstctrl_offs) am33xx_prm_assert_hardreset() argument
122 am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst, u16 rstctrl_offs, u16 rstst_offs) am33xx_prm_deassert_hardreset() argument
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| H A D | omap_hwmod_33xx_data.c | 75 .rstctrl_offs = AM33XX_RM_WKUP_RSTCTRL_OFFSET,
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| H A D | omap_hwmod_43xx_data.c | 65 .rstctrl_offs = AM43XX_RM_WKUP_RSTCTRL_OFFSET,
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| H A D | omap_hwmod_33xx_43xx_ipblock_data.c | 27 #define RSTCTRL(oh, rstctrl) ((oh).prcm.omap4.rstctrl_offs = (rstctrl))
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| H A D | omap_hwmod_7xx_data.c | 357 .rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
380 .rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
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| H A D | omap_hwmod.h | 362 * @rstctrl_offs: offset of the XXX_RSTCTRL register located in the PRM
378 u16 rstctrl_offs; member
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| H A D | omap_hwmod.c | 2822 oh->prcm.omap4.rstctrl_offs); in _omap4_assert_hardreset()
2849 oh->prcm.omap4.rstctrl_offs, in _omap4_deassert_hardreset()
2850 oh->prcm.omap4.rstctrl_offs + in _omap4_deassert_hardreset()
2876 oh->prcm.omap4.rstctrl_offs); in _omap4_is_hardreset_asserted()
2915 oh->prcm.omap4.rstctrl_offs, in _am33xx_deassert_hardreset()
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| H A D | omap_hwmod_44xx_data.c | 469 .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
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| /kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
| H A D | prminst44xx.c | 100 u16 rstctrl_offs) in omap4_prminst_is_hardreset_asserted()
104 v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs); in omap4_prminst_is_hardreset_asserted()
124 u16 rstctrl_offs) in omap4_prminst_assert_hardreset()
128 omap4_prminst_rmw_inst_reg_bits(mask, mask, part, inst, rstctrl_offs); in omap4_prminst_assert_hardreset()
140 * @rstctrl_offs: reset register offset
153 u16 rstctrl_offs, u16 rstst_offs) in omap4_prminst_deassert_hardreset()
161 rstctrl_offs) == 0) in omap4_prminst_deassert_hardreset()
168 omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs); in omap4_prminst_deassert_hardreset()
99 omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, u16 rstctrl_offs) omap4_prminst_is_hardreset_asserted() argument
123 omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, u16 rstctrl_offs) omap4_prminst_assert_hardreset() argument
152 omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst, u16 rstctrl_offs, u16 rstst_offs) omap4_prminst_deassert_hardreset() argument
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| H A D | prminst44xx.h | 28 u16 rstctrl_offs);
30 u16 rstctrl_offs);
32 s16 inst, u16 rstctrl_offs,
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| H A D | prm33xx.c | 53 * @rstctrl_offs: RM_RSTCTRL register address offset for this module
60 u16 rstctrl_offs) in am33xx_prm_is_hardreset_asserted()
64 v = am33xx_prm_read_reg(inst, rstctrl_offs); in am33xx_prm_is_hardreset_asserted()
86 u16 rstctrl_offs) in am33xx_prm_assert_hardreset()
90 am33xx_prm_rmw_reg_bits(mask, mask, inst, rstctrl_offs); in am33xx_prm_assert_hardreset()
115 s16 inst, u16 rstctrl_offs, in am33xx_prm_deassert_hardreset()
122 if (am33xx_prm_is_hardreset_asserted(shift, 0, inst, rstctrl_offs) == 0) in am33xx_prm_deassert_hardreset()
131 am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs); in am33xx_prm_deassert_hardreset()
59 am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst, u16 rstctrl_offs) am33xx_prm_is_hardreset_asserted() argument
85 am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst, u16 rstctrl_offs) am33xx_prm_assert_hardreset() argument
114 am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst, u16 rstctrl_offs, u16 rstst_offs) am33xx_prm_deassert_hardreset() argument
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| H A D | omap_hwmod.h | 362 * @rstctrl_offs: offset of the XXX_RSTCTRL register located in the PRM
378 u16 rstctrl_offs; member
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| H A D | omap_hwmod.c | 2790 oh->prcm.omap4.rstctrl_offs); in _omap4_assert_hardreset()
2817 oh->prcm.omap4.rstctrl_offs, in _omap4_deassert_hardreset()
2818 oh->prcm.omap4.rstctrl_offs + in _omap4_deassert_hardreset()
2844 oh->prcm.omap4.rstctrl_offs); in _omap4_is_hardreset_asserted()
2883 oh->prcm.omap4.rstctrl_offs, in _am33xx_deassert_hardreset()
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