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Searched refs:reg_cfg (Results 1 - 25 of 43) sorted by relevance

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/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-fhctl.c62 readl(regs->reg_cfg), readl(regs->reg_updnlmt), in dump_hw()
73 writel((readl(regs->reg_cfg) & ~(data->frddsx_en)), regs->reg_cfg); in fhctl_set_ssc_regs()
74 writel((readl(regs->reg_cfg) & ~(data->sfstrx_en)), regs->reg_cfg); in fhctl_set_ssc_regs()
75 writel((readl(regs->reg_cfg) & ~(data->fhctlx_en)), regs->reg_cfg); in fhctl_set_ssc_regs()
79 r = readl(regs->reg_cfg); in fhctl_set_ssc_regs()
82 writel(r, regs->reg_cfg); in fhctl_set_ssc_regs()
84 r = readl(regs->reg_cfg); in fhctl_set_ssc_regs()
[all...]
H A Dclk-pllfh.h50 void __iomem *reg_cfg; member
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/
H A Ddsi_cfg.c14 .reg_cfg = {
34 .reg_cfg = {
55 .reg_cfg = {
75 .reg_cfg = {
91 .reg_cfg = {
119 .reg_cfg = {
139 .reg_cfg = {
158 .reg_cfg = {
180 .reg_cfg = {
194 .reg_cfg
[all...]
H A Ddsi_cfg.h34 struct dsi_reg_config reg_cfg; member
/kernel/linux/linux-6.6/drivers/regulator/
H A Drt5759-regulator.c214 struct regulator_config reg_cfg; in rt5759_regulator_register() local
246 memset(&reg_cfg, 0, sizeof(reg_cfg)); in rt5759_regulator_register()
247 reg_cfg.dev = priv->dev; in rt5759_regulator_register()
248 reg_cfg.of_node = np; in rt5759_regulator_register()
249 reg_cfg.init_data = of_get_regulator_init_data(priv->dev, np, reg_desc); in rt5759_regulator_register()
250 reg_cfg.regmap = priv->regmap; in rt5759_regulator_register()
252 rdev = devm_regulator_register(priv->dev, reg_desc, &reg_cfg); in rt5759_regulator_register()
H A Drtq6752-regulator.c222 struct regulator_config reg_cfg = {}; in rtq6752_probe() local
255 reg_cfg.dev = &i2c->dev; in rtq6752_probe()
256 reg_cfg.regmap = priv->regmap; in rtq6752_probe()
257 reg_cfg.driver_data = priv; in rtq6752_probe()
262 &reg_cfg); in rtq6752_probe()
/kernel/linux/linux-5.10/drivers/dma/
H A Dste_dma40_ll.c136 u32 reg_cfg, in d40_phy_fill_lli()
171 lli->reg_cfg = reg_cfg; in d40_phy_fill_lli()
181 lli->reg_cfg |= BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
183 lli->reg_cfg &= ~BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
213 dma_addr_t lli_phys, dma_addr_t first_phys, u32 reg_cfg, in d40_phy_buf_to_lli()
249 reg_cfg, info, flags); in d40_phy_buf_to_lli()
270 u32 reg_cfg, in d40_phy_sg_to_lli()
298 reg_cfg, info, otherinfo, flags); in d40_phy_sg_to_lli()
363 u32 reg_cfg, in d40_log_fill_lli()
132 d40_phy_fill_lli(struct d40_phy_lli *lli, dma_addr_t data, u32 data_size, dma_addr_t next_lli, u32 reg_cfg, struct stedma40_half_channel_info *info, unsigned int flags) d40_phy_fill_lli() argument
212 d40_phy_buf_to_lli(struct d40_phy_lli *lli, dma_addr_t addr, u32 size, dma_addr_t lli_phys, dma_addr_t first_phys, u32 reg_cfg, struct stedma40_half_channel_info *info, struct stedma40_half_channel_info *otherinfo, unsigned long flags) d40_phy_buf_to_lli() argument
265 d40_phy_sg_to_lli(struct scatterlist *sg, int sg_len, dma_addr_t target, struct d40_phy_lli *lli_sg, dma_addr_t lli_phys, u32 reg_cfg, struct stedma40_half_channel_info *info, struct stedma40_half_channel_info *otherinfo, unsigned long flags) d40_phy_sg_to_lli() argument
361 d40_log_fill_lli(struct d40_log_lli *lli, dma_addr_t data, u32 data_size, u32 reg_cfg, u32 data_width, unsigned int flags) d40_log_fill_lli() argument
[all...]
H A Dste_dma40_ll.h332 * @reg_cfg: The configuration register.
345 u32 reg_cfg; member
446 u32 reg_cfg,
/kernel/linux/linux-6.6/drivers/dma/
H A Dste_dma40_ll.c137 u32 reg_cfg, in d40_phy_fill_lli()
172 lli->reg_cfg = reg_cfg; in d40_phy_fill_lli()
182 lli->reg_cfg |= BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
184 lli->reg_cfg &= ~BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
214 dma_addr_t lli_phys, dma_addr_t first_phys, u32 reg_cfg, in d40_phy_buf_to_lli()
250 reg_cfg, info, flags); in d40_phy_buf_to_lli()
271 u32 reg_cfg, in d40_phy_sg_to_lli()
299 reg_cfg, info, otherinfo, flags); in d40_phy_sg_to_lli()
364 u32 reg_cfg, in d40_log_fill_lli()
133 d40_phy_fill_lli(struct d40_phy_lli *lli, dma_addr_t data, u32 data_size, dma_addr_t next_lli, u32 reg_cfg, struct stedma40_half_channel_info *info, unsigned int flags) d40_phy_fill_lli() argument
213 d40_phy_buf_to_lli(struct d40_phy_lli *lli, dma_addr_t addr, u32 size, dma_addr_t lli_phys, dma_addr_t first_phys, u32 reg_cfg, struct stedma40_half_channel_info *info, struct stedma40_half_channel_info *otherinfo, unsigned long flags) d40_phy_buf_to_lli() argument
266 d40_phy_sg_to_lli(struct scatterlist *sg, int sg_len, dma_addr_t target, struct d40_phy_lli *lli_sg, dma_addr_t lli_phys, u32 reg_cfg, struct stedma40_half_channel_info *info, struct stedma40_half_channel_info *otherinfo, unsigned long flags) d40_phy_sg_to_lli() argument
362 d40_log_fill_lli(struct d40_log_lli *lli, dma_addr_t data, u32 data_size, u32 reg_cfg, u32 data_width, unsigned int flags) d40_log_fill_lli() argument
[all...]
H A Dste_dma40_ll.h332 * @reg_cfg: The configuration register.
345 u32 reg_cfg; member
446 u32 reg_cfg,
/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
H A Dlontium-lt9611.c115 const struct reg_sequence reg_cfg[] = { in lt9611_mipi_input_analog() local
127 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_analog()
133 struct reg_sequence reg_cfg[] = { in lt9611_mipi_input_digital() local
143 reg_cfg[1].def = 0x03; in lt9611_mipi_input_digital()
145 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_digital()
196 const struct reg_sequence reg_cfg[] = { in lt9611_pcr_setup() local
236 regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_pcr_setup()
248 const struct reg_sequence reg_cfg[] = { lt9611_pll_setup() local
370 struct reg_sequence reg_cfg[] = { lt9611_hdmi_tx_phy() local
887 static const struct reg_sequence reg_cfg[] = { lt9611_bridge_pre_enable() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/bridge/
H A Dlontium-lt9611.c94 const struct reg_sequence reg_cfg[] = { in lt9611_mipi_input_analog() local
106 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_analog()
112 struct reg_sequence reg_cfg[] = { in lt9611_mipi_input_digital() local
122 reg_cfg[1].def = 0x03; in lt9611_mipi_input_digital()
124 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_digital()
175 const struct reg_sequence reg_cfg[] = { in lt9611_pcr_setup() local
202 regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_pcr_setup()
225 const struct reg_sequence reg_cfg[] = { lt9611_pll_setup() local
389 struct reg_sequence reg_cfg[] = { lt9611_hdmi_tx_phy() local
824 static const struct reg_sequence reg_cfg[] = { lt9611_bridge_atomic_pre_enable() local
[all...]
/kernel/linux/linux-5.10/drivers/ata/
H A Dpata_octeon_cf.c90 union cvmx_mio_boot_reg_cfgx reg_cfg; in octeon_cf_set_boot_reg_cfg() local
108 reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs)); in octeon_cf_set_boot_reg_cfg()
109 reg_cfg.s.dmack = 0; /* Don't assert DMACK on access */ in octeon_cf_set_boot_reg_cfg()
110 reg_cfg.s.tim_mult = tim_mult; /* Timing mutiplier */ in octeon_cf_set_boot_reg_cfg()
111 reg_cfg.s.rd_dly = 0; /* Sample on falling edge of BOOT_OE */ in octeon_cf_set_boot_reg_cfg()
112 reg_cfg.s.sam = 0; /* Don't combine write and output enable */ in octeon_cf_set_boot_reg_cfg()
113 reg_cfg.s.we_ext = 0; /* No write enable extension */ in octeon_cf_set_boot_reg_cfg()
114 reg_cfg.s.oe_ext = 0; /* No read enable extension */ in octeon_cf_set_boot_reg_cfg()
115 reg_cfg.s.en = 1; /* Enable this region */ in octeon_cf_set_boot_reg_cfg()
116 reg_cfg in octeon_cf_set_boot_reg_cfg()
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/kernel/linux/linux-6.6/drivers/ata/
H A Dpata_octeon_cf.c87 union cvmx_mio_boot_reg_cfgx reg_cfg; in octeon_cf_set_boot_reg_cfg() local
105 reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs)); in octeon_cf_set_boot_reg_cfg()
106 reg_cfg.s.dmack = 0; /* Don't assert DMACK on access */ in octeon_cf_set_boot_reg_cfg()
107 reg_cfg.s.tim_mult = tim_mult; /* Timing mutiplier */ in octeon_cf_set_boot_reg_cfg()
108 reg_cfg.s.rd_dly = 0; /* Sample on falling edge of BOOT_OE */ in octeon_cf_set_boot_reg_cfg()
109 reg_cfg.s.sam = 0; /* Don't combine write and output enable */ in octeon_cf_set_boot_reg_cfg()
110 reg_cfg.s.we_ext = 0; /* No write enable extension */ in octeon_cf_set_boot_reg_cfg()
111 reg_cfg.s.oe_ext = 0; /* No read enable extension */ in octeon_cf_set_boot_reg_cfg()
112 reg_cfg.s.en = 1; /* Enable this region */ in octeon_cf_set_boot_reg_cfg()
113 reg_cfg in octeon_cf_set_boot_reg_cfg()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_28nm.c156 .reg_cfg = {
174 .reg_cfg = {
192 .reg_cfg = {
H A Ddsi_phy_14nm.c150 .reg_cfg = {
168 .reg_cfg = {
H A Ddsi_phy_7nm.c224 .reg_cfg = {
242 .reg_cfg = {
H A Ddsi_phy_10nm.c215 .reg_cfg = {
233 .reg_cfg = {
H A Ddsi_phy.h28 struct dsi_reg_config reg_cfg; member
H A Ddsi_phy.c483 const struct dsi_reg_entry *regs = phy->cfg->reg_cfg.regs; in dsi_phy_regulator_init()
485 int num = phy->cfg->reg_cfg.num; in dsi_phy_regulator_init()
508 const struct dsi_reg_entry *regs = phy->cfg->reg_cfg.regs; in dsi_phy_regulator_disable()
509 int num = phy->cfg->reg_cfg.num; in dsi_phy_regulator_disable()
523 const struct dsi_reg_entry *regs = phy->cfg->reg_cfg.regs; in dsi_phy_regulator_enable()
525 int num = phy->cfg->reg_cfg.num; in dsi_phy_regulator_enable()
/kernel/linux/linux-6.6/include/linux/soc/ti/
H A Domap1-mux.h306 extern int omap_cfg_reg(unsigned long reg_cfg);
308 static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } in omap_cfg_reg() argument
/kernel/linux/linux-6.6/drivers/iommu/
H A Dsprd-iommu.c216 unsigned int reg_cfg; in sprd_iommu_hw_en() local
220 reg_cfg = SPRD_EX_CFG; in sprd_iommu_hw_en()
222 reg_cfg = SPRD_VAU_CFG; in sprd_iommu_hw_en()
226 sprd_iommu_update_bits(sdev, reg_cfg, mask, 0, val); in sprd_iommu_hw_en()
/kernel/linux/linux-5.10/arch/arm/mach-omap1/include/mach/
H A Dmux.h432 extern int omap_cfg_reg(unsigned long reg_cfg);
436 static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } in omap_cfg_reg() argument
/kernel/linux/linux-5.10/drivers/clk/sprd/
H A Dpll.h13 struct reg_cfg { struct
/kernel/linux/linux-6.6/drivers/clk/sprd/
H A Dpll.h13 struct reg_cfg { struct

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