162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+ 262306a36Sopenharmony_ci 362306a36Sopenharmony_ci#include <linux/bitops.h> 462306a36Sopenharmony_ci#include <linux/delay.h> 562306a36Sopenharmony_ci#include <linux/gpio/consumer.h> 662306a36Sopenharmony_ci#include <linux/i2c.h> 762306a36Sopenharmony_ci#include <linux/kernel.h> 862306a36Sopenharmony_ci#include <linux/module.h> 962306a36Sopenharmony_ci#include <linux/mutex.h> 1062306a36Sopenharmony_ci#include <linux/regmap.h> 1162306a36Sopenharmony_ci#include <linux/regulator/driver.h> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cienum { 1462306a36Sopenharmony_ci RTQ6752_IDX_PAVDD = 0, 1562306a36Sopenharmony_ci RTQ6752_IDX_NAVDD = 1, 1662306a36Sopenharmony_ci RTQ6752_IDX_MAX 1762306a36Sopenharmony_ci}; 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci#define RTQ6752_REG_PAVDD 0x00 2062306a36Sopenharmony_ci#define RTQ6752_REG_NAVDD 0x01 2162306a36Sopenharmony_ci#define RTQ6752_REG_PAVDDONDLY 0x07 2262306a36Sopenharmony_ci#define RTQ6752_REG_PAVDDSSTIME 0x08 2362306a36Sopenharmony_ci#define RTQ6752_REG_NAVDDONDLY 0x0D 2462306a36Sopenharmony_ci#define RTQ6752_REG_NAVDDSSTIME 0x0E 2562306a36Sopenharmony_ci#define RTQ6752_REG_OPTION1 0x12 2662306a36Sopenharmony_ci#define RTQ6752_REG_CHSWITCH 0x16 2762306a36Sopenharmony_ci#define RTQ6752_REG_FAULT 0x1D 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci#define RTQ6752_VOUT_MASK GENMASK(5, 0) 3062306a36Sopenharmony_ci#define RTQ6752_NAVDDEN_MASK BIT(3) 3162306a36Sopenharmony_ci#define RTQ6752_PAVDDEN_MASK BIT(0) 3262306a36Sopenharmony_ci#define RTQ6752_PAVDDAD_MASK BIT(4) 3362306a36Sopenharmony_ci#define RTQ6752_NAVDDAD_MASK BIT(3) 3462306a36Sopenharmony_ci#define RTQ6752_PAVDDF_MASK BIT(3) 3562306a36Sopenharmony_ci#define RTQ6752_NAVDDF_MASK BIT(0) 3662306a36Sopenharmony_ci#define RTQ6752_ENABLE_MASK (BIT(RTQ6752_IDX_MAX) - 1) 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci#define RTQ6752_VOUT_MINUV 5000000 3962306a36Sopenharmony_ci#define RTQ6752_VOUT_STEPUV 50000 4062306a36Sopenharmony_ci#define RTQ6752_VOUT_NUM 47 4162306a36Sopenharmony_ci#define RTQ6752_I2CRDY_TIMEUS 1000 4262306a36Sopenharmony_ci#define RTQ6752_MINSS_TIMEUS 5000 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_cistruct rtq6752_priv { 4562306a36Sopenharmony_ci struct regmap *regmap; 4662306a36Sopenharmony_ci struct gpio_desc *enable_gpio; 4762306a36Sopenharmony_ci struct mutex lock; 4862306a36Sopenharmony_ci unsigned char enable_flag; 4962306a36Sopenharmony_ci}; 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_cistatic int rtq6752_set_vdd_enable(struct regulator_dev *rdev) 5262306a36Sopenharmony_ci{ 5362306a36Sopenharmony_ci struct rtq6752_priv *priv = rdev_get_drvdata(rdev); 5462306a36Sopenharmony_ci int rid = rdev_get_id(rdev), ret; 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci mutex_lock(&priv->lock); 5762306a36Sopenharmony_ci if (!priv->enable_flag) { 5862306a36Sopenharmony_ci if (priv->enable_gpio) { 5962306a36Sopenharmony_ci gpiod_set_value(priv->enable_gpio, 1); 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci usleep_range(RTQ6752_I2CRDY_TIMEUS, 6262306a36Sopenharmony_ci RTQ6752_I2CRDY_TIMEUS + 100); 6362306a36Sopenharmony_ci } 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci regcache_cache_only(priv->regmap, false); 6662306a36Sopenharmony_ci ret = regcache_sync(priv->regmap); 6762306a36Sopenharmony_ci if (ret) { 6862306a36Sopenharmony_ci mutex_unlock(&priv->lock); 6962306a36Sopenharmony_ci return ret; 7062306a36Sopenharmony_ci } 7162306a36Sopenharmony_ci } 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci priv->enable_flag |= BIT(rid); 7462306a36Sopenharmony_ci mutex_unlock(&priv->lock); 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci return regulator_enable_regmap(rdev); 7762306a36Sopenharmony_ci} 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_cistatic int rtq6752_set_vdd_disable(struct regulator_dev *rdev) 8062306a36Sopenharmony_ci{ 8162306a36Sopenharmony_ci struct rtq6752_priv *priv = rdev_get_drvdata(rdev); 8262306a36Sopenharmony_ci int rid = rdev_get_id(rdev), ret; 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci ret = regulator_disable_regmap(rdev); 8562306a36Sopenharmony_ci if (ret) 8662306a36Sopenharmony_ci return ret; 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci mutex_lock(&priv->lock); 8962306a36Sopenharmony_ci priv->enable_flag &= ~BIT(rid); 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci if (!priv->enable_flag) { 9262306a36Sopenharmony_ci regcache_cache_only(priv->regmap, true); 9362306a36Sopenharmony_ci regcache_mark_dirty(priv->regmap); 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ci if (priv->enable_gpio) 9662306a36Sopenharmony_ci gpiod_set_value(priv->enable_gpio, 0); 9762306a36Sopenharmony_ci 9862306a36Sopenharmony_ci } 9962306a36Sopenharmony_ci mutex_unlock(&priv->lock); 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci return 0; 10262306a36Sopenharmony_ci} 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_cistatic int rtq6752_get_error_flags(struct regulator_dev *rdev, 10562306a36Sopenharmony_ci unsigned int *flags) 10662306a36Sopenharmony_ci{ 10762306a36Sopenharmony_ci unsigned int val, events = 0; 10862306a36Sopenharmony_ci const unsigned int fault_mask[] = { 10962306a36Sopenharmony_ci RTQ6752_PAVDDF_MASK, RTQ6752_NAVDDF_MASK }; 11062306a36Sopenharmony_ci int rid = rdev_get_id(rdev), ret; 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ci ret = regmap_read(rdev->regmap, RTQ6752_REG_FAULT, &val); 11362306a36Sopenharmony_ci if (ret) 11462306a36Sopenharmony_ci return ret; 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ci if (val & fault_mask[rid]) 11762306a36Sopenharmony_ci events = REGULATOR_ERROR_REGULATION_OUT; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ci *flags = events; 12062306a36Sopenharmony_ci return 0; 12162306a36Sopenharmony_ci} 12262306a36Sopenharmony_ci 12362306a36Sopenharmony_cistatic const struct regulator_ops rtq6752_regulator_ops = { 12462306a36Sopenharmony_ci .list_voltage = regulator_list_voltage_linear, 12562306a36Sopenharmony_ci .set_voltage_sel = regulator_set_voltage_sel_regmap, 12662306a36Sopenharmony_ci .get_voltage_sel = regulator_get_voltage_sel_regmap, 12762306a36Sopenharmony_ci .enable = rtq6752_set_vdd_enable, 12862306a36Sopenharmony_ci .disable = rtq6752_set_vdd_disable, 12962306a36Sopenharmony_ci .is_enabled = regulator_is_enabled_regmap, 13062306a36Sopenharmony_ci .set_active_discharge = regulator_set_active_discharge_regmap, 13162306a36Sopenharmony_ci .get_error_flags = rtq6752_get_error_flags, 13262306a36Sopenharmony_ci}; 13362306a36Sopenharmony_ci 13462306a36Sopenharmony_cistatic const struct regulator_desc rtq6752_regulator_descs[] = { 13562306a36Sopenharmony_ci { 13662306a36Sopenharmony_ci .name = "rtq6752-pavdd", 13762306a36Sopenharmony_ci .of_match = of_match_ptr("pavdd"), 13862306a36Sopenharmony_ci .regulators_node = of_match_ptr("regulators"), 13962306a36Sopenharmony_ci .id = RTQ6752_IDX_PAVDD, 14062306a36Sopenharmony_ci .n_voltages = RTQ6752_VOUT_NUM, 14162306a36Sopenharmony_ci .ops = &rtq6752_regulator_ops, 14262306a36Sopenharmony_ci .owner = THIS_MODULE, 14362306a36Sopenharmony_ci .min_uV = RTQ6752_VOUT_MINUV, 14462306a36Sopenharmony_ci .uV_step = RTQ6752_VOUT_STEPUV, 14562306a36Sopenharmony_ci .enable_time = RTQ6752_MINSS_TIMEUS, 14662306a36Sopenharmony_ci .vsel_reg = RTQ6752_REG_PAVDD, 14762306a36Sopenharmony_ci .vsel_mask = RTQ6752_VOUT_MASK, 14862306a36Sopenharmony_ci .enable_reg = RTQ6752_REG_CHSWITCH, 14962306a36Sopenharmony_ci .enable_mask = RTQ6752_PAVDDEN_MASK, 15062306a36Sopenharmony_ci .active_discharge_reg = RTQ6752_REG_OPTION1, 15162306a36Sopenharmony_ci .active_discharge_mask = RTQ6752_PAVDDAD_MASK, 15262306a36Sopenharmony_ci .active_discharge_off = RTQ6752_PAVDDAD_MASK, 15362306a36Sopenharmony_ci }, 15462306a36Sopenharmony_ci { 15562306a36Sopenharmony_ci .name = "rtq6752-navdd", 15662306a36Sopenharmony_ci .of_match = of_match_ptr("navdd"), 15762306a36Sopenharmony_ci .regulators_node = of_match_ptr("regulators"), 15862306a36Sopenharmony_ci .id = RTQ6752_IDX_NAVDD, 15962306a36Sopenharmony_ci .n_voltages = RTQ6752_VOUT_NUM, 16062306a36Sopenharmony_ci .ops = &rtq6752_regulator_ops, 16162306a36Sopenharmony_ci .owner = THIS_MODULE, 16262306a36Sopenharmony_ci .min_uV = RTQ6752_VOUT_MINUV, 16362306a36Sopenharmony_ci .uV_step = RTQ6752_VOUT_STEPUV, 16462306a36Sopenharmony_ci .enable_time = RTQ6752_MINSS_TIMEUS, 16562306a36Sopenharmony_ci .vsel_reg = RTQ6752_REG_NAVDD, 16662306a36Sopenharmony_ci .vsel_mask = RTQ6752_VOUT_MASK, 16762306a36Sopenharmony_ci .enable_reg = RTQ6752_REG_CHSWITCH, 16862306a36Sopenharmony_ci .enable_mask = RTQ6752_NAVDDEN_MASK, 16962306a36Sopenharmony_ci .active_discharge_reg = RTQ6752_REG_OPTION1, 17062306a36Sopenharmony_ci .active_discharge_mask = RTQ6752_NAVDDAD_MASK, 17162306a36Sopenharmony_ci .active_discharge_off = RTQ6752_NAVDDAD_MASK, 17262306a36Sopenharmony_ci } 17362306a36Sopenharmony_ci}; 17462306a36Sopenharmony_ci 17562306a36Sopenharmony_cistatic int rtq6752_init_device_properties(struct rtq6752_priv *priv) 17662306a36Sopenharmony_ci{ 17762306a36Sopenharmony_ci u8 raw_vals[] = { 0, 0 }; 17862306a36Sopenharmony_ci int ret; 17962306a36Sopenharmony_ci 18062306a36Sopenharmony_ci /* Configure PAVDD on and softstart delay time to the minimum */ 18162306a36Sopenharmony_ci ret = regmap_raw_write(priv->regmap, RTQ6752_REG_PAVDDONDLY, raw_vals, 18262306a36Sopenharmony_ci ARRAY_SIZE(raw_vals)); 18362306a36Sopenharmony_ci if (ret) 18462306a36Sopenharmony_ci return ret; 18562306a36Sopenharmony_ci 18662306a36Sopenharmony_ci /* Configure NAVDD on and softstart delay time to the minimum */ 18762306a36Sopenharmony_ci return regmap_raw_write(priv->regmap, RTQ6752_REG_NAVDDONDLY, raw_vals, 18862306a36Sopenharmony_ci ARRAY_SIZE(raw_vals)); 18962306a36Sopenharmony_ci} 19062306a36Sopenharmony_ci 19162306a36Sopenharmony_cistatic bool rtq6752_is_volatile_reg(struct device *dev, unsigned int reg) 19262306a36Sopenharmony_ci{ 19362306a36Sopenharmony_ci if (reg == RTQ6752_REG_FAULT) 19462306a36Sopenharmony_ci return true; 19562306a36Sopenharmony_ci return false; 19662306a36Sopenharmony_ci} 19762306a36Sopenharmony_ci 19862306a36Sopenharmony_cistatic const struct reg_default rtq6752_reg_defaults[] = { 19962306a36Sopenharmony_ci { RTQ6752_REG_PAVDD, 0x14 }, 20062306a36Sopenharmony_ci { RTQ6752_REG_NAVDD, 0x14 }, 20162306a36Sopenharmony_ci { RTQ6752_REG_PAVDDONDLY, 0x01 }, 20262306a36Sopenharmony_ci { RTQ6752_REG_PAVDDSSTIME, 0x01 }, 20362306a36Sopenharmony_ci { RTQ6752_REG_NAVDDONDLY, 0x01 }, 20462306a36Sopenharmony_ci { RTQ6752_REG_NAVDDSSTIME, 0x01 }, 20562306a36Sopenharmony_ci { RTQ6752_REG_OPTION1, 0x07 }, 20662306a36Sopenharmony_ci { RTQ6752_REG_CHSWITCH, 0x29 }, 20762306a36Sopenharmony_ci}; 20862306a36Sopenharmony_ci 20962306a36Sopenharmony_cistatic const struct regmap_config rtq6752_regmap_config = { 21062306a36Sopenharmony_ci .reg_bits = 8, 21162306a36Sopenharmony_ci .val_bits = 8, 21262306a36Sopenharmony_ci .cache_type = REGCACHE_RBTREE, 21362306a36Sopenharmony_ci .max_register = RTQ6752_REG_FAULT, 21462306a36Sopenharmony_ci .reg_defaults = rtq6752_reg_defaults, 21562306a36Sopenharmony_ci .num_reg_defaults = ARRAY_SIZE(rtq6752_reg_defaults), 21662306a36Sopenharmony_ci .volatile_reg = rtq6752_is_volatile_reg, 21762306a36Sopenharmony_ci}; 21862306a36Sopenharmony_ci 21962306a36Sopenharmony_cistatic int rtq6752_probe(struct i2c_client *i2c) 22062306a36Sopenharmony_ci{ 22162306a36Sopenharmony_ci struct rtq6752_priv *priv; 22262306a36Sopenharmony_ci struct regulator_config reg_cfg = {}; 22362306a36Sopenharmony_ci struct regulator_dev *rdev; 22462306a36Sopenharmony_ci int i, ret; 22562306a36Sopenharmony_ci 22662306a36Sopenharmony_ci priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); 22762306a36Sopenharmony_ci if (!priv) 22862306a36Sopenharmony_ci return -ENOMEM; 22962306a36Sopenharmony_ci 23062306a36Sopenharmony_ci mutex_init(&priv->lock); 23162306a36Sopenharmony_ci 23262306a36Sopenharmony_ci priv->enable_gpio = devm_gpiod_get_optional(&i2c->dev, "enable", 23362306a36Sopenharmony_ci GPIOD_OUT_HIGH); 23462306a36Sopenharmony_ci if (IS_ERR(priv->enable_gpio)) { 23562306a36Sopenharmony_ci dev_err(&i2c->dev, "Failed to get 'enable' gpio\n"); 23662306a36Sopenharmony_ci return PTR_ERR(priv->enable_gpio); 23762306a36Sopenharmony_ci } 23862306a36Sopenharmony_ci 23962306a36Sopenharmony_ci usleep_range(RTQ6752_I2CRDY_TIMEUS, RTQ6752_I2CRDY_TIMEUS + 100); 24062306a36Sopenharmony_ci /* Default EN pin to high, PAVDD and NAVDD will be on */ 24162306a36Sopenharmony_ci priv->enable_flag = RTQ6752_ENABLE_MASK; 24262306a36Sopenharmony_ci 24362306a36Sopenharmony_ci priv->regmap = devm_regmap_init_i2c(i2c, &rtq6752_regmap_config); 24462306a36Sopenharmony_ci if (IS_ERR(priv->regmap)) { 24562306a36Sopenharmony_ci dev_err(&i2c->dev, "Failed to init regmap\n"); 24662306a36Sopenharmony_ci return PTR_ERR(priv->regmap); 24762306a36Sopenharmony_ci } 24862306a36Sopenharmony_ci 24962306a36Sopenharmony_ci ret = rtq6752_init_device_properties(priv); 25062306a36Sopenharmony_ci if (ret) { 25162306a36Sopenharmony_ci dev_err(&i2c->dev, "Failed to init device properties\n"); 25262306a36Sopenharmony_ci return ret; 25362306a36Sopenharmony_ci } 25462306a36Sopenharmony_ci 25562306a36Sopenharmony_ci reg_cfg.dev = &i2c->dev; 25662306a36Sopenharmony_ci reg_cfg.regmap = priv->regmap; 25762306a36Sopenharmony_ci reg_cfg.driver_data = priv; 25862306a36Sopenharmony_ci 25962306a36Sopenharmony_ci for (i = 0; i < ARRAY_SIZE(rtq6752_regulator_descs); i++) { 26062306a36Sopenharmony_ci rdev = devm_regulator_register(&i2c->dev, 26162306a36Sopenharmony_ci rtq6752_regulator_descs + i, 26262306a36Sopenharmony_ci ®_cfg); 26362306a36Sopenharmony_ci if (IS_ERR(rdev)) { 26462306a36Sopenharmony_ci dev_err(&i2c->dev, "Failed to init %d regulator\n", i); 26562306a36Sopenharmony_ci return PTR_ERR(rdev); 26662306a36Sopenharmony_ci } 26762306a36Sopenharmony_ci } 26862306a36Sopenharmony_ci 26962306a36Sopenharmony_ci return 0; 27062306a36Sopenharmony_ci} 27162306a36Sopenharmony_ci 27262306a36Sopenharmony_cistatic const struct of_device_id __maybe_unused rtq6752_device_table[] = { 27362306a36Sopenharmony_ci { .compatible = "richtek,rtq6752", }, 27462306a36Sopenharmony_ci {} 27562306a36Sopenharmony_ci}; 27662306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, rtq6752_device_table); 27762306a36Sopenharmony_ci 27862306a36Sopenharmony_cistatic struct i2c_driver rtq6752_driver = { 27962306a36Sopenharmony_ci .driver = { 28062306a36Sopenharmony_ci .name = "rtq6752", 28162306a36Sopenharmony_ci .probe_type = PROBE_PREFER_ASYNCHRONOUS, 28262306a36Sopenharmony_ci .of_match_table = rtq6752_device_table, 28362306a36Sopenharmony_ci }, 28462306a36Sopenharmony_ci .probe = rtq6752_probe, 28562306a36Sopenharmony_ci}; 28662306a36Sopenharmony_cimodule_i2c_driver(rtq6752_driver); 28762306a36Sopenharmony_ci 28862306a36Sopenharmony_ciMODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>"); 28962306a36Sopenharmony_ciMODULE_DESCRIPTION("Richtek RTQ6752 Regulator Driver"); 29062306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 291