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Searched refs:eint_offset (Results 1 - 15 of 15) sorted by relevance

/kernel/linux/linux-6.6/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.h69 .eint_offset = offs, \
79 .eint_offset = offs, \
89 .eint_offset = offs, \
99 .eint_offset = offs, \
109 .eint_offset = offs, \
129 .eint_offset = offs, \
139 .eint_offset = offs, \
H A Dpinctrl-exynos.c55 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
73 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()
83 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_unmask()
114 unsigned long reg_con = our_chip->eint_con + bank->eint_offset; in exynos_irq_set_type()
343 unsigned long bit = 1UL << (2 * bank->eint_offset + irqd->hwirq); in exynos_wkup_irq_set_wake()
514 + b->eint_offset); in exynos_irq_demux_eint16_31()
516 + b->eint_offset); in exynos_irq_demux_eint16_31()
644 + bank->eint_offset); in exynos_pinctrl_suspend_bank()
646 + 2 * bank->eint_offset); in exynos_pinctrl_suspend_bank()
648 + 2 * bank->eint_offset in exynos_pinctrl_suspend_bank()
[all...]
H A Dpinctrl-s3c64xx.c113 .eint_offset = eoffs, \
125 .eint_offset = eoffs, \
137 .eint_offset = eoffs, \
149 .eint_offset = eoffs, \
179 .eint_offset = eoffs, \
191 .eint_offset = eoffs, \
307 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_set_mask()
308 void __iomem *reg = d->virt_base + EINTMASK_REG(bank->eint_offset); in s3c64xx_gpio_irq_set_mask()
333 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_ack()
334 void __iomem *reg = d->virt_base + EINTPEND_REG(bank->eint_offset); in s3c64xx_gpio_irq_ack()
[all...]
H A Dpinctrl-samsung.h124 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
135 u32 eint_offset; member
149 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
171 u32 eint_offset; member
H A Dpinctrl-samsung.c1107 bank->eint_offset = bdata->eint_offset; in samsung_pinctrl_get_soc_data()
/kernel/linux/linux-5.10/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.h66 .eint_offset = offs, \
76 .eint_offset = offs, \
86 .eint_offset = offs, \
96 .eint_offset = offs, \
106 .eint_offset = offs, \
H A Dpinctrl-exynos.c57 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
75 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()
85 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_unmask()
116 unsigned long reg_con = our_chip->eint_con + bank->eint_offset; in exynos_irq_set_type()
344 unsigned long bit = 1UL << (2 * bank->eint_offset + irqd->hwirq); in exynos_wkup_irq_set_wake()
512 + b->eint_offset); in exynos_irq_demux_eint16_31()
514 + b->eint_offset); in exynos_irq_demux_eint16_31()
642 + bank->eint_offset); in exynos_pinctrl_suspend_bank()
644 + 2 * bank->eint_offset); in exynos_pinctrl_suspend_bank()
646 + 2 * bank->eint_offset in exynos_pinctrl_suspend_bank()
[all...]
H A Dpinctrl-s3c64xx.c113 .eint_offset = eoffs, \
125 .eint_offset = eoffs, \
137 .eint_offset = eoffs, \
149 .eint_offset = eoffs, \
179 .eint_offset = eoffs, \
191 .eint_offset = eoffs, \
307 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_set_mask()
308 void __iomem *reg = d->virt_base + EINTMASK_REG(bank->eint_offset); in s3c64xx_gpio_irq_set_mask()
333 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_ack()
334 void __iomem *reg = d->virt_base + EINTPEND_REG(bank->eint_offset); in s3c64xx_gpio_irq_ack()
[all...]
H A Dpinctrl-s3c24xx.c78 .eint_offset = eoffs, \
167 int index = bank->eint_offset + data->hwirq; in s3c24xx_eint_type()
318 unsigned char index = bank->eint_offset + data->hwirq; in s3c24xx_eint_ack()
327 unsigned char index = bank->eint_offset + data->hwirq; in s3c24xx_eint_mask()
339 unsigned char index = bank->eint_offset + data->hwirq; in s3c24xx_eint_unmask()
420 if (!(bank->eint_mask & (1 << (bank->eint_offset + hw)))) in s3c24xx_gpf_irq_map()
449 if (!(bank->eint_mask & (1 << (bank->eint_offset + hw)))) in s3c24xx_gpg_irq_map()
535 ops = (bank->eint_offset == 0) ? &s3c24xx_gpf_irq_ops in s3c24xx_eint_init()
545 irq = bank->eint_offset; in s3c24xx_eint_init()
H A Dpinctrl-samsung.h116 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
127 u32 eint_offset; member
141 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
163 u32 eint_offset; member
H A Dpinctrl-samsung.c1067 bank->eint_offset = bdata->eint_offset; in samsung_pinctrl_get_soc_data()
/kernel/linux/linux-5.10/drivers/pinctrl/mediatek/
H A Dmtk-eint.c399 int virq, eint_offset; in mtk_eint_set_debounce() local
407 eint_offset = (eint_num % 4) * 8; in mtk_eint_set_debounce()
431 clr_bit = 0xff << eint_offset; in mtk_eint_set_debounce()
435 eint_offset; in mtk_eint_set_debounce()
436 rst = MTK_EINT_DBNC_RST_BIT << eint_offset; in mtk_eint_set_debounce()
/kernel/linux/linux-6.6/drivers/pinctrl/mediatek/
H A Dmtk-eint.c423 int virq, eint_offset; in mtk_eint_set_debounce() local
432 eint_offset = (eint_num % 4) * 8; in mtk_eint_set_debounce()
456 clr_bit = 0xff << eint_offset; in mtk_eint_set_debounce()
460 eint_offset; in mtk_eint_set_debounce()
461 rst = MTK_EINT_DBNC_RST_BIT << eint_offset; in mtk_eint_set_debounce()
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
H A Ds3c64xx.c244 #define eint_offset(irq) ((irq) - IRQ_EINT(0)) macro
245 #define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq)))
279 int offs = eint_offset(data->irq); in s3c_irq_eint_set_type()
/kernel/linux/linux-6.6/arch/arm/mach-s3c/
H A Ds3c64xx.c236 #define eint_offset(irq) ((irq) - IRQ_EINT(0)) macro
237 #define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq)))
271 int offs = eint_offset(data->irq); in s3c_irq_eint_set_type()

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