| /kernel/linux/linux-5.10/drivers/spi/ |
| H A D | spi-zynqmp-gqspi.c | 270 u32 config_reg; in zynqmp_qspi_init_hw() local
292 config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); in zynqmp_qspi_init_hw()
293 config_reg &= ~GQSPI_CFG_MODE_EN_MASK; in zynqmp_qspi_init_hw()
295 config_reg |= GQSPI_CFG_GEN_FIFO_START_MODE_MASK; in zynqmp_qspi_init_hw()
297 config_reg &= ~GQSPI_CFG_ENDIAN_MASK; in zynqmp_qspi_init_hw()
299 config_reg &= ~GQSPI_CFG_EN_POLL_TO_MASK; in zynqmp_qspi_init_hw()
301 config_reg |= GQSPI_CFG_WP_HOLD_MASK; in zynqmp_qspi_init_hw()
303 config_reg &= ~GQSPI_CFG_BAUD_RATE_DIV_MASK; in zynqmp_qspi_init_hw()
305 config_reg &= ~GQSPI_CFG_CLK_PHA_MASK; in zynqmp_qspi_init_hw()
307 config_reg in zynqmp_qspi_init_hw()
451 u32 config_reg, baud_rate_val = 0; zynqmp_qspi_config_op() local
637 u32 config_reg, genfifoentry; zynqmp_process_dma_irq() local
736 u32 rx_bytes, rx_rem, config_reg; zynqmp_qspi_setuprxdma() local
796 u32 config_reg; zynqmp_qspi_write_op() local
[all...] |
| H A D | spi-zynq-qspi.c | 183 u32 config_reg; in zynq_qspi_init_hw() local
189 config_reg = 0; in zynq_qspi_init_hw()
192 config_reg |= ZYNQ_QSPI_LCFG_TWO_MEM; in zynq_qspi_init_hw()
194 zynq_qspi_write(xqspi, ZYNQ_QSPI_LINEAR_CFG_OFFSET, config_reg); in zynq_qspi_init_hw()
202 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_init_hw()
203 config_reg &= ~(ZYNQ_QSPI_CONFIG_MSTREN_MASK | in zynq_qspi_init_hw()
210 config_reg |= (ZYNQ_QSPI_CONFIG_MSTREN_MASK | in zynq_qspi_init_hw()
214 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg); in zynq_qspi_init_hw()
294 u32 config_reg; in zynq_qspi_chipselect() local
298 config_reg in zynq_qspi_chipselect()
336 u32 config_reg, baud_rate_val = 0; zynq_qspi_config_op() local
[all...] |
| /kernel/linux/linux-6.6/drivers/spi/ |
| H A D | spi-zynq-qspi.c | 183 u32 config_reg; in zynq_qspi_init_hw() local
189 config_reg = 0; in zynq_qspi_init_hw()
192 config_reg |= ZYNQ_QSPI_LCFG_TWO_MEM; in zynq_qspi_init_hw()
194 zynq_qspi_write(xqspi, ZYNQ_QSPI_LINEAR_CFG_OFFSET, config_reg); in zynq_qspi_init_hw()
202 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_init_hw()
203 config_reg &= ~(ZYNQ_QSPI_CONFIG_MSTREN_MASK | in zynq_qspi_init_hw()
210 config_reg |= (ZYNQ_QSPI_CONFIG_MSTREN_MASK | in zynq_qspi_init_hw()
214 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg); in zynq_qspi_init_hw()
294 u32 config_reg; in zynq_qspi_chipselect() local
298 config_reg in zynq_qspi_chipselect()
336 u32 config_reg, baud_rate_val = 0; zynq_qspi_config_op() local
[all...] |
| H A D | spi-zynqmp-gqspi.c | 356 u32 config_reg, baud_rate_val = 0; in zynqmp_qspi_init_hw() local
379 config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); in zynqmp_qspi_init_hw()
380 config_reg &= ~GQSPI_CFG_MODE_EN_MASK; in zynqmp_qspi_init_hw()
382 config_reg |= GQSPI_CFG_GEN_FIFO_START_MODE_MASK; in zynqmp_qspi_init_hw()
384 config_reg &= ~GQSPI_CFG_ENDIAN_MASK; in zynqmp_qspi_init_hw()
386 config_reg &= ~GQSPI_CFG_EN_POLL_TO_MASK; in zynqmp_qspi_init_hw()
388 config_reg |= GQSPI_CFG_WP_HOLD_MASK; in zynqmp_qspi_init_hw()
390 config_reg &= ~GQSPI_CFG_BAUD_RATE_DIV_MASK; in zynqmp_qspi_init_hw()
393 config_reg |= GQSPI_CFG_CLK_PHA_MASK; in zynqmp_qspi_init_hw()
395 config_reg in zynqmp_qspi_init_hw()
559 u32 config_reg, req_speed_hz, baud_rate_val = 0; zynqmp_qspi_config_op() local
747 u32 config_reg, genfifoentry; zynqmp_process_dma_irq() local
848 u32 rx_bytes, rx_rem, config_reg; zynqmp_qspi_setuprxdma() local
908 u32 config_reg; zynqmp_qspi_write_op() local
[all...] |
| /kernel/linux/linux-5.10/drivers/iio/common/ms_sensors/ |
| H A D | ms_sensors_i2c.c | 254 u8 *config_reg) in ms_sensors_read_config_reg()
264 ret = i2c_master_recv(client, config_reg, 1); in ms_sensors_read_config_reg()
269 dev_dbg(&client->dev, "Config register :%x\n", *config_reg); in ms_sensors_read_config_reg()
288 u8 config_reg; in ms_sensors_write_resolution() local
291 ret = ms_sensors_read_config_reg(dev_data->client, &config_reg); in ms_sensors_write_resolution()
295 config_reg &= 0x7E; in ms_sensors_write_resolution()
296 config_reg |= ((i & 1) << 7) + ((i & 2) >> 1); in ms_sensors_write_resolution()
300 config_reg); in ms_sensors_write_resolution()
319 u8 config_reg; in ms_sensors_show_battery_low() local
322 ret = ms_sensors_read_config_reg(dev_data->client, &config_reg); in ms_sensors_show_battery_low()
253 ms_sensors_read_config_reg(struct i2c_client *client, u8 *config_reg) ms_sensors_read_config_reg() argument
345 u8 config_reg; ms_sensors_show_heater() local
373 u8 val, config_reg; ms_sensors_write_heater() local
[all...] |
| /kernel/linux/linux-6.6/drivers/iio/common/ms_sensors/ |
| H A D | ms_sensors_i2c.c | 254 u8 *config_reg) in ms_sensors_read_config_reg()
264 ret = i2c_master_recv(client, config_reg, 1); in ms_sensors_read_config_reg()
269 dev_dbg(&client->dev, "Config register :%x\n", *config_reg); in ms_sensors_read_config_reg()
288 u8 config_reg; in ms_sensors_write_resolution() local
291 ret = ms_sensors_read_config_reg(dev_data->client, &config_reg); in ms_sensors_write_resolution()
295 config_reg &= 0x7E; in ms_sensors_write_resolution()
296 config_reg |= ((i & 1) << 7) + ((i & 2) >> 1); in ms_sensors_write_resolution()
300 config_reg); in ms_sensors_write_resolution()
319 u8 config_reg; in ms_sensors_show_battery_low() local
322 ret = ms_sensors_read_config_reg(dev_data->client, &config_reg); in ms_sensors_show_battery_low()
253 ms_sensors_read_config_reg(struct i2c_client *client, u8 *config_reg) ms_sensors_read_config_reg() argument
345 u8 config_reg; ms_sensors_show_heater() local
373 u8 val, config_reg; ms_sensors_write_heater() local
[all...] |
| /kernel/linux/linux-6.6/drivers/net/phy/ |
| H A D | aquantia_main.c | 365 u32 config_reg; in aqr107_read_rate() local
380 config_reg = VEND1_GLOBAL_CFG_10M; in aqr107_read_rate()
384 config_reg = VEND1_GLOBAL_CFG_100M; in aqr107_read_rate()
388 config_reg = VEND1_GLOBAL_CFG_1G; in aqr107_read_rate()
392 config_reg = VEND1_GLOBAL_CFG_2_5G; in aqr107_read_rate()
396 config_reg = VEND1_GLOBAL_CFG_5G; in aqr107_read_rate()
400 config_reg = VEND1_GLOBAL_CFG_10G; in aqr107_read_rate()
407 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); in aqr107_read_rate()
|
| /kernel/linux/linux-5.10/drivers/input/misc/ |
| H A D | max77693-haptic.c | 107 unsigned int value, config_reg; in max77693_haptic_configure() local
116 config_reg = MAX77693_HAPTIC_REG_CONFIG2; in max77693_haptic_configure()
122 config_reg = MAX77843_HAP_REG_MCONFIG; in max77693_haptic_configure()
129 config_reg, value); in max77693_haptic_configure()
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| /kernel/linux/linux-6.6/drivers/input/misc/ |
| H A D | max77693-haptic.c | 107 unsigned int value, config_reg; in max77693_haptic_configure() local
116 config_reg = MAX77693_HAPTIC_REG_CONFIG2; in max77693_haptic_configure()
122 config_reg = MAX77843_HAP_REG_MCONFIG; in max77693_haptic_configure()
129 config_reg, value); in max77693_haptic_configure()
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| H A D | clk-pll.c | 103 regmap_read(pll->clkr.regmap, pll->config_reg, &config); in clk_pll_recalc_rate()
162 regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits); in clk_pll_set_rate()
242 regmap_update_bits(regmap, pll->config_reg, mask, val); in clk_pll_configure()
|
| H A D | clk-hfpll.h | 17 u32 config_reg; member
|
| H A D | clk-pll.h | 32 * @config_reg: config register
43 u32 config_reg; member
|
| H A D | a53-pll.c | 63 pll->config_reg = 0x14; in qcom_a53pll_probe()
|
| H A D | hfpll.c | 22 .config_reg = 0x14,
|
| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| H A D | clk-pll.c | 103 regmap_read(pll->clkr.regmap, pll->config_reg, &config); in clk_pll_recalc_rate()
162 regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits); in clk_pll_set_rate()
242 regmap_update_bits(regmap, pll->config_reg, mask, val); in clk_pll_configure()
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| H A D | clk-hfpll.h | 17 u32 config_reg; member
|
| H A D | clk-pll.h | 32 * @config_reg: config register
43 u32 config_reg; member
|
| H A D | hfpll.c | 22 .config_reg = 0x14,
|
| /kernel/linux/linux-6.6/drivers/hwmon/ |
| H A D | max6620.c | 99 static const u8 config_reg[] = { variable
171 ret = i2c_smbus_read_byte_data(client, config_reg[i]); in max6620_update_device()
449 reg = i2c_smbus_read_byte_data(client, config_reg[i]); in max6620_init_client()
456 err = i2c_smbus_write_byte_data(client, config_reg[i], data->fancfg[i]); in max6620_init_client()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/loongson/ |
| H A D | loongson_drv.h | 111 struct config_reg { struct
121 struct config_reg config_regs[256];
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| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| H A D | sirfsoc_uart.c | 700 unsigned long config_reg = 0; in sirfsoc_uart_set_termios() local
717 config_reg |= SIRFUART_DATA_BIT_LEN_8; in sirfsoc_uart_set_termios()
721 config_reg |= SIRFUART_DATA_BIT_LEN_7; in sirfsoc_uart_set_termios()
725 config_reg |= SIRFUART_DATA_BIT_LEN_6; in sirfsoc_uart_set_termios()
729 config_reg |= SIRFUART_DATA_BIT_LEN_5; in sirfsoc_uart_set_termios()
733 config_reg |= SIRFUART_STOP_BIT_LEN_2; in sirfsoc_uart_set_termios()
759 config_reg |= SIRFUART_STICK_BIT_MARK; in sirfsoc_uart_set_termios()
761 config_reg |= SIRFUART_STICK_BIT_SPACE; in sirfsoc_uart_set_termios()
764 config_reg |= SIRFUART_STICK_BIT_ODD; in sirfsoc_uart_set_termios()
766 config_reg | in sirfsoc_uart_set_termios()
[all...] |
| /kernel/linux/linux-6.6/drivers/pinctrl/renesas/ |
| H A D | core.c | 252 const struct pinmux_cfg_reg *config_reg = in sh_pfc_get_config_reg() local
254 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
255 unsigned int f_width = config_reg->field_width; in sh_pfc_get_config_reg()
271 curr_width = abs(config_reg->var_field_width[m]); in sh_pfc_get_config_reg()
272 if (config_reg->var_field_width[m] < 0) in sh_pfc_get_config_reg()
278 if (config_reg->enum_ids[pos + n] == enum_id) { in sh_pfc_get_config_reg()
279 *crp = config_reg; in sh_pfc_get_config_reg()
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| /kernel/linux/linux-5.10/drivers/pinctrl/renesas/ |
| H A D | core.c | 244 const struct pinmux_cfg_reg *config_reg = in sh_pfc_get_config_reg() local
246 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
247 unsigned int f_width = config_reg->field_width; in sh_pfc_get_config_reg()
263 curr_width = config_reg->var_field_width[m]; in sh_pfc_get_config_reg()
267 if (config_reg->enum_ids[pos + n] == enum_id) { in sh_pfc_get_config_reg()
268 *crp = config_reg; in sh_pfc_get_config_reg()
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| H A D | i2c-mlxbf.c | 1394 u32 config_reg; in mlxbf_i2c_init_master() local
1431 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1432 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_ASSERT_PINS(priv->bus, in mlxbf_i2c_init_master()
1433 config_reg); in mlxbf_i2c_init_master()
1434 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1436 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
1437 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_RESET_PINS(priv->bus, in mlxbf_i2c_init_master()
1438 config_reg); in mlxbf_i2c_init_master()
1439 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
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| /kernel/linux/linux-6.6/drivers/i2c/busses/ |
| H A D | i2c-mlxbf.c | 1413 u32 config_reg; in mlxbf_i2c_init_master() local
1450 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1451 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_ASSERT_PINS(priv->bus, in mlxbf_i2c_init_master()
1452 config_reg); in mlxbf_i2c_init_master()
1453 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1455 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
1456 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_RESET_PINS(priv->bus, in mlxbf_i2c_init_master()
1457 config_reg); in mlxbf_i2c_init_master()
1458 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
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