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Searched refs:clk_val (Results 1 - 3 of 3) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-u300.c431 * @clk_val: magic value to poke in the register to enable/disable
442 u16 clk_val; member
502 if (sclk->clk_val == U300_SYSCON_SBCER_UART_CLK_EN) in syscon_clk_unprepare()
517 if (sclk->clk_val == 0xFFFFU) in syscon_clk_enable()
520 writew(sclk->clk_val, syscon_vbase + U300_SYSCON_SBCER); in syscon_clk_enable()
531 if (sclk->clk_val == 0xFFFFU) in syscon_clk_disable()
534 if (sclk->clk_val == U300_SYSCON_SBCER_UART_CLK_EN) in syscon_clk_disable()
537 writew(sclk->clk_val, syscon_vbase + U300_SYSCON_SBCDR); in syscon_clk_disable()
571 switch (sclk->clk_val) { in syscon_clk_recalc_rate()
638 if (sclk->clk_val ! in syscon_clk_round_rate()
693 syscon_clk_register(struct device *dev, const char *name, const char *parent_name, unsigned long flags, bool hw_ctrld, void __iomem *res_reg, u8 res_bit, void __iomem *en_reg, u8 en_bit, u16 clk_val) syscon_clk_register() argument
749 u16 clk_val; global() member
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/kernel/linux/linux-5.10/sound/soc/qcom/qdsp6/
H A Dq6afe.c472 u32 clk_val; member
1132 dcfg.clk_val = freq; in q6afe_port_set_sysclk()
/kernel/linux/linux-6.6/sound/soc/qcom/qdsp6/
H A Dq6afe.c474 u32 clk_val; member
1138 dcfg.clk_val = freq; in q6afe_port_set_sysclk()

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