clk_mux_uart0_p (reference) in projects: kernel - OpenGrok search results

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Searched refs:clk_mux_uart0_p (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/hisilicon/
H A D	clk-hi3660.c	`250 clk_mux_uart0_p[] = {"clkin_sys", "clk_div_uart0",}; variable 272 { HI3660_CLK_MUX_UART0, "clk_mux_uart0", clk_mux_uart0_p, 273 ARRAY_SIZE(clk_mux_uart0_p), CLK_SET_RATE_PARENT, 0xac, 2, 1,`
H A D	clk-hi3670.c	`381 clk_mux_uart0_p[] = { "clkin_sys", "clk_div_uart0", }; variable 448 { HI3670_CLK_MUX_UART0, "clk_mux_uart0", clk_mux_uart0_p, 449 ARRAY_SIZE(clk_mux_uart0_p), CLK_SET_RATE_PARENT,`
/kernel/linux/linux-6.6/drivers/clk/hisilicon/
H A D	clk-hi3660.c	`250 clk_mux_uart0_p[] = {"clkin_sys", "clk_div_uart0",}; variable 272 { HI3660_CLK_MUX_UART0, "clk_mux_uart0", clk_mux_uart0_p, 273 ARRAY_SIZE(clk_mux_uart0_p), CLK_SET_RATE_PARENT, 0xac, 2, 1,`
H A D	clk-hi3670.c	`381 clk_mux_uart0_p[] = { "clkin_sys", "clk_div_uart0", }; variable 448 { HI3670_CLK_MUX_UART0, "clk_mux_uart0", clk_mux_uart0_p, 449 ARRAY_SIZE(clk_mux_uart0_p), CLK_SET_RATE_PARENT,`

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