| /kernel/linux/linux-5.10/drivers/edac/ |
| H A D | octeon_edac-lmc.c | 40 union cvmx_lmcx_mem_cfg0 cfg0; in octeon_lmc_edac_poll() local
44 cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mci->mc_idx)); in octeon_lmc_edac_poll()
45 if (cfg0.s.sec_err || cfg0.s.ded_err) { in octeon_lmc_edac_poll()
54 if (cfg0.s.sec_err) { in octeon_lmc_edac_poll()
57 cfg0.s.sec_err = -1; /* Done, re-arm */ in octeon_lmc_edac_poll()
61 if (cfg0.s.ded_err) { in octeon_lmc_edac_poll()
64 cfg0.s.ded_err = -1; /* Done, re-arm */ in octeon_lmc_edac_poll()
68 cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mci->mc_idx), cfg0.u64); in octeon_lmc_edac_poll()
238 union cvmx_lmcx_mem_cfg0 cfg0; in octeon_lmc_edac_probe() local
[all...] |
| /kernel/linux/linux-6.6/drivers/edac/ |
| H A D | octeon_edac-lmc.c | 40 union cvmx_lmcx_mem_cfg0 cfg0; in octeon_lmc_edac_poll() local
44 cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mci->mc_idx)); in octeon_lmc_edac_poll()
45 if (cfg0.s.sec_err || cfg0.s.ded_err) { in octeon_lmc_edac_poll()
54 if (cfg0.s.sec_err) { in octeon_lmc_edac_poll()
57 cfg0.s.sec_err = -1; /* Done, re-arm */ in octeon_lmc_edac_poll()
61 if (cfg0.s.ded_err) { in octeon_lmc_edac_poll()
64 cfg0.s.ded_err = -1; /* Done, re-arm */ in octeon_lmc_edac_poll()
68 cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mci->mc_idx), cfg0.u64); in octeon_lmc_edac_poll()
238 union cvmx_lmcx_mem_cfg0 cfg0; in octeon_lmc_edac_probe() local
[all...] |
| /kernel/linux/linux-6.6/arch/mips/ralink/ |
| H A D | mt7620.c | 223 u32 cfg0; in prom_soc_init() local
231 cfg0 = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_SYSTEM_CONFIG0); in prom_soc_init()
233 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; in prom_soc_init()
235 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & in prom_soc_init()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | ramnv10.c | 31 u32 cfg0 = nvkm_rd32(device, 0x100200); in nv10_ram_new() local
34 if (cfg0 & 0x00000001) in nv10_ram_new()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | ramnv10.c | 31 u32 cfg0 = nvkm_rd32(device, 0x100200); in nv10_ram_new() local
34 if (cfg0 & 0x00000001) in nv10_ram_new()
|
| /kernel/linux/linux-5.10/arch/loongarch/mm/ |
| H A D | cache.c | 91 #define populate_cache_properties(cfg0, cdesc, level, leaf) \
99 if (cfg0 & LXIUPRIV) \
101 if (cfg0 & LXIUINCL) \
|
| /kernel/linux/linux-6.6/arch/loongarch/mm/ |
| H A D | cache.c | 94 #define populate_cache_properties(cfg0, cdesc, level, leaf) \
102 if (cfg0 & LXIUPRIV) \
104 if (cfg0 & LXIUINCL) \
|
| /kernel/linux/linux-5.10/drivers/clk/zte/ |
| H A D | clk-zx296702.c | 53 { .rate = 700000000, .cfg0 = 0x800405d1, .cfg1 = 0x04555555 },
54 { .rate = 800000000, .cfg0 = 0x80040691, .cfg1 = 0x04aaaaaa },
55 { .rate = 900000000, .cfg0 = 0x80040791, .cfg1 = 0x04000000 },
56 { .rate = 1000000000, .cfg0 = 0x80040851, .cfg1 = 0x04555555 },
57 { .rate = 1100000000, .cfg0 = 0x80040911, .cfg1 = 0x04aaaaaa },
58 { .rate = 1200000000, .cfg0 = 0x80040a11, .cfg1 = 0x04000000 },
|
| H A D | clk.h | 16 u32 cfg0; member
33 .cfg0 = _cfg0, \
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/exynos/ |
| H A D | exynos_drm_fimc.c | 1013 u32 cfg0, cfg1; in fimc_start() local
1025 cfg0 = fimc_read(ctx, EXYNOS_MSCTRL); in fimc_start()
1026 cfg0 &= ~EXYNOS_MSCTRL_INPUT_MASK; in fimc_start()
1027 cfg0 |= EXYNOS_MSCTRL_INPUT_MEMORY; in fimc_start()
1028 fimc_write(ctx, cfg0, EXYNOS_MSCTRL); in fimc_start()
1033 cfg0 = fimc_read(ctx, EXYNOS_CIIMGCPT); in fimc_start()
1034 cfg0 &= ~EXYNOS_CIIMGCPT_IMGCPTEN_SC; in fimc_start()
1035 cfg0 |= EXYNOS_CIIMGCPT_IMGCPTEN_SC; in fimc_start()
1046 cfg0 |= EXYNOS_CIIMGCPT_IMGCPTEN; in fimc_start()
1047 fimc_write(ctx, cfg0, EXYNOS_CIIMGCP in fimc_start()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/exynos/ |
| H A D | exynos_drm_fimc.c | 1011 u32 cfg0, cfg1; in fimc_start() local
1023 cfg0 = fimc_read(ctx, EXYNOS_MSCTRL); in fimc_start()
1024 cfg0 &= ~EXYNOS_MSCTRL_INPUT_MASK; in fimc_start()
1025 cfg0 |= EXYNOS_MSCTRL_INPUT_MEMORY; in fimc_start()
1026 fimc_write(ctx, cfg0, EXYNOS_MSCTRL); in fimc_start()
1031 cfg0 = fimc_read(ctx, EXYNOS_CIIMGCPT); in fimc_start()
1032 cfg0 &= ~EXYNOS_CIIMGCPT_IMGCPTEN_SC; in fimc_start()
1033 cfg0 |= EXYNOS_CIIMGCPT_IMGCPTEN_SC; in fimc_start()
1044 cfg0 |= EXYNOS_CIIMGCPT_IMGCPTEN; in fimc_start()
1045 fimc_write(ctx, cfg0, EXYNOS_CIIMGCP in fimc_start()
[all...] |
| /kernel/linux/linux-5.10/arch/mips/ralink/ |
| H A D | mt7620.c | 649 u32 cfg0; in prom_soc_init() local
690 cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0); in prom_soc_init()
692 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; in prom_soc_init()
694 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & in prom_soc_init()
|
| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt76x2/ |
| H A D | phy.c | 187 u32 cfg0, cfg1; in mt76x2_configure_tx_delay() local
190 cfg0 = bw ? 0x000b0c01 : 0x00101101; in mt76x2_configure_tx_delay()
193 cfg0 = bw ? 0x000b0b01 : 0x00101001; in mt76x2_configure_tx_delay()
196 mt76_wr(dev, MT_TX_SW_CFG0, cfg0); in mt76x2_configure_tx_delay()
|
| /kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/mt76x2/ |
| H A D | phy.c | 187 u32 cfg0, cfg1; in mt76x2_configure_tx_delay() local
190 cfg0 = bw ? 0x000b0c01 : 0x00101101; in mt76x2_configure_tx_delay()
193 cfg0 = bw ? 0x000b0b01 : 0x00101001; in mt76x2_configure_tx_delay()
196 mt76_wr(dev, MT_TX_SW_CFG0, cfg0); in mt76x2_configure_tx_delay()
|
| /kernel/linux/linux-5.10/drivers/soc/qcom/ |
| H A D | qcom-geni-se.c | 398 u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0}; in geni_se_config_packing() local
426 cfg0 = cfg[0] | (cfg[1] << PACKING_VECTOR_SHIFT); in geni_se_config_packing()
430 writel_relaxed(cfg0, se->base + SE_GENI_TX_PACKING_CFG0); in geni_se_config_packing()
434 writel_relaxed(cfg0, se->base + SE_GENI_RX_PACKING_CFG0); in geni_se_config_packing()
|
| /kernel/linux/linux-6.6/drivers/soc/qcom/ |
| H A D | qcom-geni-se.c | 434 u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0}; in geni_se_config_packing() local
462 cfg0 = cfg[0] | (cfg[1] << PACKING_VECTOR_SHIFT); in geni_se_config_packing()
466 writel_relaxed(cfg0, se->base + SE_GENI_TX_PACKING_CFG0); in geni_se_config_packing()
470 writel_relaxed(cfg0, se->base + SE_GENI_RX_PACKING_CFG0); in geni_se_config_packing()
|
| /kernel/linux/linux-5.10/arch/sparc/include/asm/ |
| H A D | sbi.h | 20 /* 0x0010 */ u32 cfg0; /* Slot0 config reg */ member
|
| /kernel/linux/linux-6.6/arch/sparc/include/asm/ |
| H A D | sbi.h | 20 /* 0x0010 */ u32 cfg0; /* Slot0 config reg */ member
|
| /kernel/linux/linux-6.6/drivers/infiniband/hw/erdma/ |
| H A D | erdma_hw.h | 224 /* create_cq cfg0 */
240 u32 cfg0; member
249 /* regmr/deregmr cfg0 */
268 u32 cfg0; member
305 /* create qp cfg0 */
331 u32 cfg0; member
|
| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| H A D | qcom_nandc.c | 317 __le32 cfg0; member
505 * @cfg0, cfg1, cfg0_raw..: NANDc register configurations needed for
534 u32 cfg0, cfg1; member
713 return ®s->cfg0; in offset_to_nandc_reg()
814 u32 cmd, cfg0, cfg1, ecc_bch_cfg; in update_rw_regs() local
827 cfg0 = (host->cfg0 & ~(7U << CW_PER_PAGE)) | in update_rw_regs()
833 cfg0 = (host->cfg0_raw & ~(7U << CW_PER_PAGE)) | in update_rw_regs()
841 nandc_set_reg(chip, NAND_DEV0_CFG0, cfg0); in update_rw_regs()
1875 host->cfg0 in qcom_nandc_codeword_fixup()
[all...] |
| /kernel/linux/linux-5.10/drivers/net/phy/ |
| H A D | dp83640.c | 107 /* remember state of cfg0 during calibration */
108 int cfg0; member
545 u16 cfg0 = 0, ver; in enable_status_frames() local
548 cfg0 = PSF_EVNT_EN | PSF_RXTS_EN | PSF_TXTS_EN | ENDIAN_FLAG; in enable_status_frames()
554 ext_write(0, phydev, PAGE5, PSF_CFG0, cfg0); in enable_status_frames()
628 u16 cal_gpio, cfg0, evnt, ptp_trig, trigger, val; in recalibrate() local
645 tmp->cfg0 = ext_read(tmp->phydev, PAGE5, PSF_CFG0); in recalibrate()
650 cfg0 = ext_read(master, PAGE5, PSF_CFG0); in recalibrate()
726 ext_write(0, tmp->phydev, PAGE5, PSF_CFG0, tmp->cfg0); in recalibrate()
728 ext_write(0, master, PAGE5, PSF_CFG0, cfg0); in recalibrate()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/phy/ |
| H A D | dp83640.c | 115 /* remember state of cfg0 during calibration */
116 int cfg0; member
553 u16 cfg0 = 0, ver; in enable_status_frames() local
556 cfg0 = PSF_EVNT_EN | PSF_RXTS_EN | PSF_TXTS_EN | ENDIAN_FLAG; in enable_status_frames()
562 ext_write(0, phydev, PAGE5, PSF_CFG0, cfg0); in enable_status_frames()
636 u16 cal_gpio, cfg0, evnt, ptp_trig, trigger, val; in recalibrate() local
652 tmp->cfg0 = ext_read(tmp->phydev, PAGE5, PSF_CFG0); in recalibrate()
657 cfg0 = ext_read(master, PAGE5, PSF_CFG0); in recalibrate()
729 ext_write(0, tmp->phydev, PAGE5, PSF_CFG0, tmp->cfg0); in recalibrate()
730 ext_write(0, master, PAGE5, PSF_CFG0, cfg0); in recalibrate()
[all...] |
| /kernel/linux/linux-5.10/drivers/clk/sirf/ |
| H A D | clk-common.c | 86 u32 cfg0 = clkc_readl(clk->regofs); in pll_clk_recalc_rate() local
87 u32 nf = (cfg0 & (BIT(13) - 1)) + 1; in pll_clk_recalc_rate()
88 u32 nr = ((cfg0 >> 13) & (BIT(6) - 1)) + 1; in pll_clk_recalc_rate()
89 u32 od = ((cfg0 >> 19) & (BIT(4) - 1)) + 1; in pll_clk_recalc_rate()
|
| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| H A D | qcom_nandc.c | 299 __le32 cfg0; member
429 * @cfg0, cfg1, cfg0_raw..: NANDc register configurations needed for
448 u32 cfg0, cfg1; member
618 return ®s->cfg0; in offset_to_nandc_reg()
684 u32 cmd, cfg0, cfg1, ecc_bch_cfg; in update_rw_regs() local
696 cfg0 = (host->cfg0 & ~(7U << CW_PER_PAGE)) | in update_rw_regs()
702 cfg0 = (host->cfg0_raw & ~(7U << CW_PER_PAGE)) | in update_rw_regs()
710 nandc_set_reg(nandc, NAND_DEV0_CFG0, cfg0); in update_rw_regs()
2575 host->cfg0 in qcom_nand_attach_chip()
[all...] |
| /kernel/linux/linux-5.10/sound/pci/au88x0/ |
| H A D | au88x0_core.c | 1096 dma->cfg0 = 0; in vortex_adbdma_setbuffers()
1109 dma->cfg0 |= 0x12000000; in vortex_adbdma_setbuffers()
1117 dma->cfg0 |= 0x88000000 | 0x44000000 | 0x10000000 | (psize - 1); in vortex_adbdma_setbuffers()
1124 dma->cfg0 |= 0x80000000 | 0x40000000 | ((psize - 1) << 0xc); in vortex_adbdma_setbuffers()
1131 pr_debug( "vortex: cfg0 = 0x%x\nvortex: cfg1=0x%x\n", in vortex_adbdma_setbuffers()
1132 dma->cfg0, dma->cfg1); in vortex_adbdma_setbuffers()
1134 hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG0 + (adbdma << 3), dma->cfg0); in vortex_adbdma_setbuffers()
1375 dma->cfg0 = 0; in vortex_wtdma_setbuffers()
1387 dma->cfg0 |= 0x12000000; in vortex_wtdma_setbuffers()
1394 dma->cfg0 | in vortex_wtdma_setbuffers()
[all...] |