Lines Matching refs:cfg0
317 __le32 cfg0;
505 * @cfg0, cfg1, cfg0_raw..: NANDc register configurations needed for
534 u32 cfg0, cfg1;
713 return ®s->cfg0;
814 u32 cmd, cfg0, cfg1, ecc_bch_cfg;
827 cfg0 = (host->cfg0 & ~(7U << CW_PER_PAGE)) |
833 cfg0 = (host->cfg0_raw & ~(7U << CW_PER_PAGE)) |
841 nandc_set_reg(chip, NAND_DEV0_CFG0, cfg0);
1875 host->cfg0 &= ~(SPARE_SIZE_BYTES_MASK | UD_SIZE_BYTES_MASK);
1876 host->cfg0 |= host->spare_bytes << SPARE_SIZE_BYTES |
2488 host->cfg0 = (cwperpage - 1) << CW_PER_PAGE
2536 "cfg0 %x cfg1 %x ecc_buf_cfg %x ecc_bch cfg %x cw_size %d cw_data %d strength %d parity_bytes %d steps %d\n",
2537 host->cfg0, host->cfg1, host->ecc_buf_cfg, host->ecc_bch_cfg,