| /kernel/linux/linux-5.10/tools/perf/util/ |
| H A D | cacheline.h | 7 int __pure cacheline_size(void);
12 return (address & ~(cacheline_size() - 1)); in cl_address()
18 return (address & (cacheline_size() - 1)); in cl_offset()
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| H A D | cacheline.c | 17 int cacheline_size(void) in cacheline_size() function
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| H A D | sort.c | 2680 if (sd->entry == &sort_mem_dcacheline && cacheline_size() == 0) in sort_dimension__add()
2726 if (!cacheline_size() && !strncasecmp(tok, "dcacheline", strlen(tok))) in setup_sort_list()
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| /kernel/linux/linux-6.6/tools/perf/util/ |
| H A D | cacheline.h | 7 int __pure cacheline_size(void);
16 u64 size = cacheline_size(); in cl_address()
27 u64 size = cacheline_size(); in cl_offset()
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| H A D | cacheline.c | 17 int cacheline_size(void) in cacheline_size() function
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| H A D | sort.c | 3247 if (sd->entry == &sort_mem_dcacheline && cacheline_size() == 0) in sort_dimension__add()
3293 if (!cacheline_size() && !strncasecmp(tok, "dcacheline", strlen(tok))) in setup_sort_list()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_topology.h | 99 uint32_t cacheline_size; member
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| H A D | kfd_crat.c | 1107 props->cacheline_size = cache->cache_line_size; in kfd_parse_subtype_cache()
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| H A D | kfd_topology.c | 357 cache->cacheline_size); in kfd_cache_show()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_topology.h | 128 uint32_t cacheline_size; member
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| H A D | kfd_crat.c | 321 props->cacheline_size = cache->cache_line_size; in kfd_parse_subtype_cache()
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| H A D | kfd_topology.c | 354 cache->cacheline_size); in kfd_cache_show()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| H A D | i9xx_wm.c | 355 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
363 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
371 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
379 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
387 .cacheline_size = I915_FIFO_LINE_SIZE,
395 .cacheline_size = I915_FIFO_LINE_SIZE,
403 .cacheline_size = I915_FIFO_LINE_SIZE,
411 .cacheline_size = I830_FIFO_LINE_SIZE,
419 .cacheline_size = I830_FIFO_LINE_SIZE,
427 .cacheline_size
[all...] |
| H A D | intel_display_types.h | 1571 u8 cacheline_size; member
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| /kernel/linux/linux-5.10/drivers/pci/ |
| H A D | pci.c | 4329 u8 cacheline_size; in pci_set_cacheline_size() local
4336 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4337 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size()
4338 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size()
4344 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4345 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| H A D | intel_pm.c | 578 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
586 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
594 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
602 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
610 .cacheline_size = I915_FIFO_LINE_SIZE,
618 .cacheline_size = I915_FIFO_LINE_SIZE,
626 .cacheline_size = I915_FIFO_LINE_SIZE,
634 .cacheline_size = I830_FIFO_LINE_SIZE,
642 .cacheline_size = I830_FIFO_LINE_SIZE,
650 .cacheline_size
[all...] |
| /kernel/linux/linux-5.10/drivers/scsi/ |
| H A D | myrs.h | 413 enum myrs_cacheline_size cacheline_size; /* Byte 7 */ member
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| H A D | myrb.h | 297 unsigned short cacheline_size; /* Bytes 104-105 */ member
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| H A D | myrs.c | 1575 if (ldev_info->cacheline_size) { in myrs_mode_sense()
1577 put_unaligned_be16(1 << ldev_info->cacheline_size, in myrs_mode_sense()
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| /kernel/linux/linux-6.6/drivers/scsi/ |
| H A D | myrs.h | 413 enum myrs_cacheline_size cacheline_size; /* Byte 7 */ member
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| H A D | myrb.h | 297 unsigned short cacheline_size; /* Bytes 104-105 */ member
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| H A D | myrs.c | 1575 if (ldev_info->cacheline_size) { in myrs_mode_sense()
1577 put_unaligned_be16(1 << ldev_info->cacheline_size, in myrs_mode_sense()
|
| /kernel/linux/linux-6.6/drivers/pci/ |
| H A D | pci.c | 4518 u8 cacheline_size; in pci_set_cacheline_size() local
4525 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4526 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size()
4527 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size()
4533 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4534 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| H A D | intel_display_types.h | 1193 u8 cacheline_size; member
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| /kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/ |
| H A D | tg3.c | 17106 int cacheline_size; in tg3_calc_dma_bndry() local
17112 cacheline_size = 1024; in tg3_calc_dma_bndry()
17114 cacheline_size = (int) byte * 4; in tg3_calc_dma_bndry()
17154 switch (cacheline_size) { in tg3_calc_dma_bndry()
17179 switch (cacheline_size) { in tg3_calc_dma_bndry()
17196 switch (cacheline_size) { in tg3_calc_dma_bndry()
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