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Searched refs:WRITE_DATA_DST_SEL (Results 1 - 25 of 32) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dsi_enums.h152 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dnvd.h89 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dsoc15d.h110 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dcikd.h260 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dvid.h142 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dgfx_v8_0.c897 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v8_0_ring_test_ib()
5198 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
5206 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
5214 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
5222 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
6303 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6312 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
7155 WRITE_DATA_DST_SEL(8) | in gfx_v8_0_ring_emit_ce_meta()
7188 WRITE_DATA_DST_SEL(8) | in gfx_v8_0_ring_emit_de_meta()
H A Dgfx_v7_0.c3281 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_wreg()
4107 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
4115 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
4123 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
4131 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
H A Dgfx_v9_0.c1010 WRITE_DATA_DST_SEL(0) | in gfx_v9_0_write_data_to_reg()
1100 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_0_ring_test_ib()
5440 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5449 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5473 WRITE_DATA_DST_SEL(8) | in gfx_v9_0_ring_emit_ce_meta()
5495 WRITE_DATA_DST_SEL(8) | in gfx_v9_0_ring_emit_de_meta()
H A Dsid.h1700 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dsi_enums.h152 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dnvd.h89 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dsoc15d.h110 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dcikd.h260 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dvid.h142 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dgfx_v8_0.c892 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v8_0_ring_test_ib()
5163 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
5171 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
5179 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
5187 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
6275 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6284 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
7191 WRITE_DATA_DST_SEL(8) | in gfx_v8_0_ring_emit_ce_meta()
7224 WRITE_DATA_DST_SEL(8) | in gfx_v8_0_ring_emit_de_meta()
H A Dgfx_v7_0.c3215 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_wreg()
4045 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
4053 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
4061 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
4069 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
H A Dgfx_v9_4_3.c218 WRITE_DATA_DST_SEL(0) | in gfx_v9_4_3_write_data_to_reg()
305 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_4_3_ring_test_ib()
2634 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_4_3_ring_emit_fence_kiq()
2643 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_4_3_ring_emit_fence_kiq()
H A Dgfx_v9_0.c965 WRITE_DATA_DST_SEL(0) | in gfx_v9_0_write_data_to_reg()
1048 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_0_ring_test_ib()
5393 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5402 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5441 WRITE_DATA_DST_SEL(8) | in gfx_v9_0_ring_emit_ce_meta()
5554 WRITE_DATA_DST_SEL(8) | in gfx_v9_0_ring_emit_de_meta()
H A Dgfx_v11_0.c293 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v11_0_write_data_to_reg()
409 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v11_0_ring_test_ib()
5452 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v11_0_ring_emit_fence_kiq()
5461 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v11_0_ring_emit_fence_kiq()
5622 WRITE_DATA_DST_SEL(8) | in gfx_v11_0_ring_emit_de_meta()
H A Dsid.h1700 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dcik.c3752 radeon_ring_write(ring, WRITE_DATA_DST_SEL(1)); in cik_ring_ib_execute()
5695 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5709 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5716 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5727 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5738 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
H A Dcikd.h1728 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dsid.h1637 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dcik.c3742 radeon_ring_write(ring, WRITE_DATA_DST_SEL(1)); in cik_ring_ib_execute()
5684 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5698 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5705 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5716 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5727 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
H A Dcikd.h1728 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro

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