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Searched refs:SSE (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/arch/x86/crypto/
H A Dcrct10dif-pcl-asm_64.S2 # Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
H A Dchacha-ssse3-x86_64.S231 # the state matrix in SSE registers four times. As we need some scratch
236 # which allows us to do XOR in SSE registers. 8/16-bit word rotation is
/kernel/linux/linux-6.6/arch/x86/crypto/
H A Dcrct10dif-pcl-asm_64.S2 # Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
H A Dchacha-ssse3-x86_64.S231 # the state matrix in SSE registers four times. As we need some scratch
236 # which allows us to do XOR in SSE registers. 8/16-bit word rotation is
/kernel/linux/linux-5.10/drivers/scsi/aic7xxx/
H A Daic7xxx_pci.c591 #define SSE 0x40 macro
1942 if (status1 & SSE) { in ahc_pci_intr()
1963 if ((status1 & (DPE|SSE|RMA|RTA|STA|DPR)) == 0) { in ahc_pci_intr()
H A Daic79xx_pci.c732 #define SSE 0x40 macro
/kernel/linux/linux-6.6/drivers/scsi/aic7xxx/
H A Daic7xxx_pci.c591 #define SSE 0x40 macro
1942 if (status1 & SSE) { in ahc_pci_intr()
1963 if ((status1 & (DPE|SSE|RMA|RTA|STA|DPR)) == 0) { in ahc_pci_intr()
H A Daic79xx_pci.c730 #define SSE 0x40 macro

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