SLCR_DDR_CLK_CTRL (reference) in projects: kernel - OpenGrok search results

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Searched refs:SLCR_DDR_CLK_CTRL (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/zynq/
H A D	clkc.c	`26 #define SLCR_DDR_CLK_CTRL (zynq_clkc_base + 0x24) macro 328 SLCR_DDR_CLK_CTRL, 26, 6, CLK_DIVIDER_ONE_BASED \| in zynq_clk_setup() 331 "ddr2x_div", 0, SLCR_DDR_CLK_CTRL, 1, 0, &ddrclk_lock); in zynq_clk_setup() 334 SLCR_DDR_CLK_CTRL, 20, 6, CLK_DIVIDER_ONE_BASED \| in zynq_clk_setup() 337 "ddr3x_div", 0, SLCR_DDR_CLK_CTRL, 0, 0, &ddrclk_lock); in zynq_clk_setup()`
/kernel/linux/linux-6.6/drivers/clk/zynq/
H A D	clkc.c	`26 #define SLCR_DDR_CLK_CTRL (zynq_clkc_base + 0x24) macro 326 SLCR_DDR_CLK_CTRL, 26, 6, CLK_DIVIDER_ONE_BASED \| in zynq_clk_setup() 329 "ddr2x_div", 0, SLCR_DDR_CLK_CTRL, 1, 0, &ddrclk_lock); in zynq_clk_setup() 332 SLCR_DDR_CLK_CTRL, 20, 6, CLK_DIVIDER_ONE_BASED \| in zynq_clk_setup() 335 "ddr3x_div", 0, SLCR_DDR_CLK_CTRL, 0, 0, &ddrclk_lock); in zynq_clk_setup()`

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