| /kernel/linux/linux-6.6/tools/testing/selftests/bpf/progs/ |
| H A D | kprobe_multi.c | 47 #define SET(__var, __addr, __cookie) ({ \ in kprobe_multi_check() macro
54 SET(kretprobe_test1_result, &bpf_fentry_test1, 8); in kprobe_multi_check()
55 SET(kretprobe_test2_result, &bpf_fentry_test2, 2); in kprobe_multi_check()
56 SET(kretprobe_test3_result, &bpf_fentry_test3, 7); in kprobe_multi_check()
57 SET(kretprobe_test4_result, &bpf_fentry_test4, 6); in kprobe_multi_check()
58 SET(kretprobe_test5_result, &bpf_fentry_test5, 5); in kprobe_multi_check()
59 SET(kretprobe_test6_result, &bpf_fentry_test6, 4); in kprobe_multi_check()
60 SET(kretprobe_test7_result, &bpf_fentry_test7, 3); in kprobe_multi_check()
61 SET(kretprobe_test8_result, &bpf_fentry_test8, 1); in kprobe_multi_check()
63 SET(kprobe_test1_resul in kprobe_multi_check()
73 #undef SET kprobe_multi_check() macro
[all...] |
| H A D | uprobe_multi.c | 47 #define SET(__var, __addr, __cookie) ({ \ in uprobe_multi_check() macro
54 SET(uretprobe_multi_func_1_result, uprobe_multi_func_1_addr, 2); in uprobe_multi_check()
55 SET(uretprobe_multi_func_2_result, uprobe_multi_func_2_addr, 3); in uprobe_multi_check()
56 SET(uretprobe_multi_func_3_result, uprobe_multi_func_3_addr, 1); in uprobe_multi_check()
58 SET(uprobe_multi_func_1_result, uprobe_multi_func_1_addr, 3); in uprobe_multi_check()
59 SET(uprobe_multi_func_2_result, uprobe_multi_func_2_addr, 1); in uprobe_multi_check()
60 SET(uprobe_multi_func_3_result, uprobe_multi_func_3_addr, 2); in uprobe_multi_check()
63 #undef SET in uprobe_multi_check() macro
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/sti/ |
| H A D | sti_awg_utils.c | 17 SET, enumerator
67 * pixel. So we transform SKIP into SET in awg_generate_instr()
69 opcode = SET; in awg_generate_instr()
97 case SET: in awg_generate_instr()
138 ret |= awg_generate_instr((timing->trailing_pixels > 0) ? SET : RPLSET, in awg_generate_line_signal()
148 ret |= awg_generate_instr(SET, val, 0, 0, fwparams); in awg_generate_line_signal()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/sti/ |
| H A D | sti_awg_utils.c | 17 SET, enumerator
67 * pixel. So we transform SKIP into SET in awg_generate_instr()
69 opcode = SET; in awg_generate_instr()
97 case SET: in awg_generate_instr()
138 ret |= awg_generate_instr((timing->trailing_pixels > 0) ? SET : RPLSET, in awg_generate_line_signal()
148 ret |= awg_generate_instr(SET, val, 0, 0, fwparams); in awg_generate_line_signal()
|
| /kernel/linux/linux-5.10/drivers/clk/imx/ |
| H A D | clk-pfd.c | 21 * register has SET, CLR and TOG registers at offset 0x4 0x8 and 0xc.
31 #define SET 0x4 macro
48 writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + SET); in clk_pfd_disable()
100 writel_relaxed(frac << (pfd->idx * 8), pfd->reg + SET); in clk_pfd_set_rate()
|
| /kernel/linux/linux-6.6/drivers/clk/imx/ |
| H A D | clk-pfd.c | 22 * register has SET, CLR and TOG registers at offset 0x4 0x8 and 0xc.
32 #define SET 0x4 macro
49 writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + SET); in clk_pfd_disable()
101 writel_relaxed(frac << (pfd->idx * 8), pfd->reg + SET); in clk_pfd_set_rate()
|
| /kernel/linux/linux-5.10/drivers/clk/mxs/ |
| H A D | clk-pll.c | 36 writel_relaxed(1 << pll->power, pll->base + SET); in clk_pll_prepare()
63 writel_relaxed(1 << 31, pll->base + SET); in clk_pll_disable()
|
| H A D | clk-imx28.c | 74 writel_relaxed(clkmux << BP_SAIF_CLKMUX, DIGCTRL + SET); in mxs_saif_clkmux_select()
84 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
87 writel_relaxed(1 << BP_ENET_DIV_TIME, ENET + SET); in clk_misc_init()
|
| H A D | clk-imx23.c | 49 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
70 writel_relaxed(30 << BP_FRAC_IOFRAC, FRAC + SET); in clk_misc_init()
|
| /kernel/linux/linux-6.6/drivers/clk/mxs/ |
| H A D | clk-pll.c | 36 writel_relaxed(1 << pll->power, pll->base + SET); in clk_pll_prepare()
63 writel_relaxed(1 << 31, pll->base + SET); in clk_pll_disable()
|
| H A D | clk-imx28.c | 74 writel_relaxed(clkmux << BP_SAIF_CLKMUX, DIGCTRL + SET); in mxs_saif_clkmux_select()
84 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
87 writel_relaxed(1 << BP_ENET_DIV_TIME, ENET + SET); in clk_misc_init()
|
| H A D | clk-imx23.c | 49 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); in clk_misc_init()
70 writel_relaxed(30 << BP_FRAC_IOFRAC, FRAC + SET); in clk_misc_init()
|
| /kernel/linux/linux-5.10/arch/mips/mm/ |
| H A D | uasm-mips.c | 88 [insn_dmfc0] = {M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET},
91 [insn_dmtc0] = {M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET},
139 [insn_mfc0] = {M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
140 [insn_mfhc0] = {M(cop0_op, mfhc0_op, 0, 0, 0, 0), RT | RD | SET},
147 [insn_mtc0] = {M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
148 [insn_mthc0] = {M(cop0_op, mthc0_op, 0, 0, 0, 0), RT | RD | SET},
263 if (ip->fields & SET) in build_insn()
|
| /kernel/linux/linux-6.6/arch/mips/mm/ |
| H A D | uasm-mips.c | 88 [insn_dmfc0] = {M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET},
91 [insn_dmtc0] = {M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET},
139 [insn_mfc0] = {M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
140 [insn_mfhc0] = {M(cop0_op, mfhc0_op, 0, 0, 0, 0), RT | RD | SET},
147 [insn_mtc0] = {M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
148 [insn_mthc0] = {M(cop0_op, mthc0_op, 0, 0, 0, 0), RT | RD | SET},
265 if (ip->fields & SET) in build_insn()
|
| /kernel/linux/linux-5.10/arch/arm/boot/compressed/ |
| H A D | head-sharpsl.S | 131 bic r3, r3, #0x11 @ SET NCE
132 orr r3, r3, #0x0a @ SET CLR + FLWP
137 orr r3, r3, #4 @ SET ALE
|
| /kernel/linux/linux-6.6/arch/arm/boot/compressed/ |
| H A D | head-sharpsl.S | 131 bic r3, r3, #0x11 @ SET NCE
132 orr r3, r3, #0x0a @ SET CLR + FLWP
137 orr r3, r3, #4 @ SET ALE
|
| /kernel/linux/linux-5.10/drivers/dma/dw-edma/ |
| H A D | dw-edma-v0-core.c | 31 #define SET(dw, name, value) \ macro
40 SET(dw, wr_##name, value); \
42 SET(dw, rd_##name, value); \
52 SET(dw, wr_##name, value); \
53 SET(dw, rd_##name, value); \
|
| /kernel/linux/linux-5.10/drivers/pwm/ |
| H A D | pwm-mxs.c | 17 #define SET 0x4 macro
108 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); in mxs_pwm_apply()
|
| /kernel/linux/linux-6.6/drivers/pwm/ |
| H A D | pwm-mxs.c | 17 #define SET 0x4 macro
108 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); in mxs_pwm_apply()
|
| /kernel/linux/linux-5.10/include/video/ |
| H A D | gbe.h | 85 #define SET(v, f, msb, lsb) \ macro
91 SET((v), (f), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB)
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/imx/dcss/ |
| H A D | dcss-dev.h | 13 #define SET 0x04 macro
19 #define dcss_set(v, c) writel((v), (c) + SET)
|
| /kernel/linux/linux-6.6/include/video/ |
| H A D | gbe.h | 85 #define SET(v, f, msb, lsb) \ macro
91 SET((v), (f), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB)
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/imx/dcss/ |
| H A D | dcss-dev.h | 15 #define SET 0x04 macro
21 #define dcss_set(v, c) writel((v), (c) + SET)
|
| /kernel/linux/linux-5.10/drivers/pinctrl/freescale/ |
| H A D | pinctrl-mxs.h | 12 #define SET 0x4 macro
|
| /kernel/linux/linux-6.6/drivers/pinctrl/freescale/ |
| H A D | pinctrl-mxs.h | 12 #define SET 0x4 macro
|