18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright (C) STMicroelectronics SA 2014
48c2ecf20Sopenharmony_ci * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
58c2ecf20Sopenharmony_ci */
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci#include <drm/drm_print.h>
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ci#include "sti_awg_utils.h"
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#define AWG_DELAY (-5)
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci#define AWG_OPCODE_OFFSET 10
148c2ecf20Sopenharmony_ci#define AWG_MAX_ARG       0x3ff
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_cienum opcode {
178c2ecf20Sopenharmony_ci	SET,
188c2ecf20Sopenharmony_ci	RPTSET,
198c2ecf20Sopenharmony_ci	RPLSET,
208c2ecf20Sopenharmony_ci	SKIP,
218c2ecf20Sopenharmony_ci	STOP,
228c2ecf20Sopenharmony_ci	REPEAT,
238c2ecf20Sopenharmony_ci	REPLAY,
248c2ecf20Sopenharmony_ci	JUMP,
258c2ecf20Sopenharmony_ci	HOLD,
268c2ecf20Sopenharmony_ci};
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_cistatic int awg_generate_instr(enum opcode opcode,
298c2ecf20Sopenharmony_ci			      long int arg,
308c2ecf20Sopenharmony_ci			      long int mux_sel,
318c2ecf20Sopenharmony_ci			      long int data_en,
328c2ecf20Sopenharmony_ci			      struct awg_code_generation_params *fwparams)
338c2ecf20Sopenharmony_ci{
348c2ecf20Sopenharmony_ci	u32 instruction = 0;
358c2ecf20Sopenharmony_ci	u32 mux = (mux_sel << 8) & 0x1ff;
368c2ecf20Sopenharmony_ci	u32 data_enable = (data_en << 9) & 0x2ff;
378c2ecf20Sopenharmony_ci	long int arg_tmp = arg;
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci	/* skip, repeat and replay arg should not exceed 1023.
408c2ecf20Sopenharmony_ci	 * If user wants to exceed this value, the instruction should be
418c2ecf20Sopenharmony_ci	 * duplicate and arg should be adjust for each duplicated instruction.
428c2ecf20Sopenharmony_ci	 *
438c2ecf20Sopenharmony_ci	 * mux_sel is used in case of SAV/EAV synchronization.
448c2ecf20Sopenharmony_ci	 */
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci	while (arg_tmp > 0) {
478c2ecf20Sopenharmony_ci		arg = arg_tmp;
488c2ecf20Sopenharmony_ci		if (fwparams->instruction_offset >= AWG_MAX_INST) {
498c2ecf20Sopenharmony_ci			DRM_ERROR("too many number of instructions\n");
508c2ecf20Sopenharmony_ci			return -EINVAL;
518c2ecf20Sopenharmony_ci		}
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci		switch (opcode) {
548c2ecf20Sopenharmony_ci		case SKIP:
558c2ecf20Sopenharmony_ci			/* leave 'arg' + 1 pixel elapsing without changing
568c2ecf20Sopenharmony_ci			 * output bus */
578c2ecf20Sopenharmony_ci			arg--; /* pixel adjustment */
588c2ecf20Sopenharmony_ci			arg_tmp--;
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci			if (arg < 0) {
618c2ecf20Sopenharmony_ci				/* SKIP instruction not needed */
628c2ecf20Sopenharmony_ci				return 0;
638c2ecf20Sopenharmony_ci			}
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci			if (arg == 0) {
668c2ecf20Sopenharmony_ci				/* SKIP 0 not permitted but we want to skip 1
678c2ecf20Sopenharmony_ci				 * pixel. So we transform SKIP into SET
688c2ecf20Sopenharmony_ci				 * instruction */
698c2ecf20Sopenharmony_ci				opcode = SET;
708c2ecf20Sopenharmony_ci				break;
718c2ecf20Sopenharmony_ci			}
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci			mux = 0;
748c2ecf20Sopenharmony_ci			data_enable = 0;
758c2ecf20Sopenharmony_ci			arg &= AWG_MAX_ARG;
768c2ecf20Sopenharmony_ci			break;
778c2ecf20Sopenharmony_ci		case REPEAT:
788c2ecf20Sopenharmony_ci		case REPLAY:
798c2ecf20Sopenharmony_ci			if (arg == 0) {
808c2ecf20Sopenharmony_ci				/* REPEAT or REPLAY instruction not needed */
818c2ecf20Sopenharmony_ci				return 0;
828c2ecf20Sopenharmony_ci			}
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci			mux = 0;
858c2ecf20Sopenharmony_ci			data_enable = 0;
868c2ecf20Sopenharmony_ci			arg &= AWG_MAX_ARG;
878c2ecf20Sopenharmony_ci			break;
888c2ecf20Sopenharmony_ci		case JUMP:
898c2ecf20Sopenharmony_ci			mux = 0;
908c2ecf20Sopenharmony_ci			data_enable = 0;
918c2ecf20Sopenharmony_ci			arg |= 0x40; /* for jump instruction 7th bit is 1 */
928c2ecf20Sopenharmony_ci			arg &= AWG_MAX_ARG;
938c2ecf20Sopenharmony_ci			break;
948c2ecf20Sopenharmony_ci		case STOP:
958c2ecf20Sopenharmony_ci			arg = 0;
968c2ecf20Sopenharmony_ci			break;
978c2ecf20Sopenharmony_ci		case SET:
988c2ecf20Sopenharmony_ci		case RPTSET:
998c2ecf20Sopenharmony_ci		case RPLSET:
1008c2ecf20Sopenharmony_ci		case HOLD:
1018c2ecf20Sopenharmony_ci			arg &= (0x0ff);
1028c2ecf20Sopenharmony_ci			break;
1038c2ecf20Sopenharmony_ci		default:
1048c2ecf20Sopenharmony_ci			DRM_ERROR("instruction %d does not exist\n", opcode);
1058c2ecf20Sopenharmony_ci			return -EINVAL;
1068c2ecf20Sopenharmony_ci		}
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci		arg_tmp = arg_tmp - arg;
1098c2ecf20Sopenharmony_ci
1108c2ecf20Sopenharmony_ci		arg = ((arg + mux) + data_enable);
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ci		instruction = ((opcode) << AWG_OPCODE_OFFSET) | arg;
1138c2ecf20Sopenharmony_ci		fwparams->ram_code[fwparams->instruction_offset] =
1148c2ecf20Sopenharmony_ci			instruction & (0x3fff);
1158c2ecf20Sopenharmony_ci		fwparams->instruction_offset++;
1168c2ecf20Sopenharmony_ci	}
1178c2ecf20Sopenharmony_ci	return 0;
1188c2ecf20Sopenharmony_ci}
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_cistatic int awg_generate_line_signal(
1218c2ecf20Sopenharmony_ci		struct awg_code_generation_params *fwparams,
1228c2ecf20Sopenharmony_ci		struct awg_timing *timing)
1238c2ecf20Sopenharmony_ci{
1248c2ecf20Sopenharmony_ci	long int val;
1258c2ecf20Sopenharmony_ci	int ret = 0;
1268c2ecf20Sopenharmony_ci
1278c2ecf20Sopenharmony_ci	if (timing->trailing_pixels > 0) {
1288c2ecf20Sopenharmony_ci		/* skip trailing pixel */
1298c2ecf20Sopenharmony_ci		val = timing->blanking_level;
1308c2ecf20Sopenharmony_ci		ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_ci		val = timing->trailing_pixels - 1 + AWG_DELAY;
1338c2ecf20Sopenharmony_ci		ret |= awg_generate_instr(SKIP, val, 0, 0, fwparams);
1348c2ecf20Sopenharmony_ci	}
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_ci	/* set DE signal high */
1378c2ecf20Sopenharmony_ci	val = timing->blanking_level;
1388c2ecf20Sopenharmony_ci	ret |= awg_generate_instr((timing->trailing_pixels > 0) ? SET : RPLSET,
1398c2ecf20Sopenharmony_ci			val, 0, 1, fwparams);
1408c2ecf20Sopenharmony_ci
1418c2ecf20Sopenharmony_ci	if (timing->blanking_pixels > 0) {
1428c2ecf20Sopenharmony_ci		/* skip the number of active pixel */
1438c2ecf20Sopenharmony_ci		val = timing->active_pixels - 1;
1448c2ecf20Sopenharmony_ci		ret |= awg_generate_instr(SKIP, val, 0, 1, fwparams);
1458c2ecf20Sopenharmony_ci
1468c2ecf20Sopenharmony_ci		/* set DE signal low */
1478c2ecf20Sopenharmony_ci		val = timing->blanking_level;
1488c2ecf20Sopenharmony_ci		ret |= awg_generate_instr(SET, val, 0, 0, fwparams);
1498c2ecf20Sopenharmony_ci	}
1508c2ecf20Sopenharmony_ci
1518c2ecf20Sopenharmony_ci	return ret;
1528c2ecf20Sopenharmony_ci}
1538c2ecf20Sopenharmony_ci
1548c2ecf20Sopenharmony_ciint sti_awg_generate_code_data_enable_mode(
1558c2ecf20Sopenharmony_ci		struct awg_code_generation_params *fwparams,
1568c2ecf20Sopenharmony_ci		struct awg_timing *timing)
1578c2ecf20Sopenharmony_ci{
1588c2ecf20Sopenharmony_ci	long int val, tmp_val;
1598c2ecf20Sopenharmony_ci	int ret = 0;
1608c2ecf20Sopenharmony_ci
1618c2ecf20Sopenharmony_ci	if (timing->trailing_lines > 0) {
1628c2ecf20Sopenharmony_ci		/* skip trailing lines */
1638c2ecf20Sopenharmony_ci		val = timing->blanking_level;
1648c2ecf20Sopenharmony_ci		ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ci		val = timing->trailing_lines - 1;
1678c2ecf20Sopenharmony_ci		ret |= awg_generate_instr(REPLAY, val, 0, 0, fwparams);
1688c2ecf20Sopenharmony_ci	}
1698c2ecf20Sopenharmony_ci
1708c2ecf20Sopenharmony_ci	tmp_val = timing->active_lines - 1;
1718c2ecf20Sopenharmony_ci
1728c2ecf20Sopenharmony_ci	while (tmp_val > 0) {
1738c2ecf20Sopenharmony_ci		/* generate DE signal for each line */
1748c2ecf20Sopenharmony_ci		ret |= awg_generate_line_signal(fwparams, timing);
1758c2ecf20Sopenharmony_ci		/* replay the sequence as many active lines defined */
1768c2ecf20Sopenharmony_ci		ret |= awg_generate_instr(REPLAY,
1778c2ecf20Sopenharmony_ci					  min_t(int, AWG_MAX_ARG, tmp_val),
1788c2ecf20Sopenharmony_ci					  0, 0, fwparams);
1798c2ecf20Sopenharmony_ci		tmp_val -= AWG_MAX_ARG;
1808c2ecf20Sopenharmony_ci	}
1818c2ecf20Sopenharmony_ci
1828c2ecf20Sopenharmony_ci	if (timing->blanking_lines > 0) {
1838c2ecf20Sopenharmony_ci		/* skip blanking lines */
1848c2ecf20Sopenharmony_ci		val = timing->blanking_level;
1858c2ecf20Sopenharmony_ci		ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
1868c2ecf20Sopenharmony_ci
1878c2ecf20Sopenharmony_ci		val = timing->blanking_lines - 1;
1888c2ecf20Sopenharmony_ci		ret |= awg_generate_instr(REPLAY, val, 0, 0, fwparams);
1898c2ecf20Sopenharmony_ci	}
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ci	return ret;
1928c2ecf20Sopenharmony_ci}
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