RADEON_M_SPLL_REF_FB_DIV (reference) in projects: kernel - OpenGrok search results

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Searched refs:RADEON_M_SPLL_REF_FB_DIV (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A D	radeon_clocks.c	45 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_engine_clock() 51 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_engine_clock() 75 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_memory_clock() 81 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_memory_clock() 152 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_read_clocks_OF() 216 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_get_clock_info() 268 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_get_clock_info() 360 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in calc_eng_mem_clock() 422 tmp = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_set_engine_clock() 425 WREG32_PLL(RADEON_M_SPLL_REF_FB_DIV, tm in radeon_legacy_set_engine_clock() [all...]
H A D	radeon_reg.h	`1647 #define RADEON_M_SPLL_REF_FB_DIV 0x000a /* PLL */ macro`
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A D	radeon_clocks.c	45 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_engine_clock() 51 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_engine_clock() 75 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_memory_clock() 81 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_memory_clock() 152 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_read_clocks_OF() 216 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_get_clock_info() 268 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_get_clock_info() 360 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in calc_eng_mem_clock() 422 tmp = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_set_engine_clock() 425 WREG32_PLL(RADEON_M_SPLL_REF_FB_DIV, tm in radeon_legacy_set_engine_clock() [all...]
H A D	radeon_reg.h	`1647 #define RADEON_M_SPLL_REF_FB_DIV 0x000a /* PLL */ macro`

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