Home
Sort by
last modified time
|
relevance
|
path
Repository(s)
applications
arkcompiler
base
build
commonlibrary
developtools
device
docs
domains
drivers
foundation
ide
interface
kernel
napi_generator
productdefine
test
third_party
vendor
select all
invert selection
clear
Full Search
Search through all text tokens(words,strings,identifiers,numbers) in index.
Definition
Only finds symbol definitions(where e.g a variable(function,...) is defined).
Symbol
Only finds symbol(e.g. methods classes,function,variables).
File Path
Path of the source file(use "/").If you want just exact path,enclose it in "".Source files end with: .jar/.bz2/.a/.h/.java...
History
History log comments.
Type
Any
Bzip(2)
C
Clojure
C#
C++
ELF
Erlang
Image file
Fortran
Golang
GZIP
Haskell
Jar
Java
Java class
JavaScript
Lisp
Lua
Pascal
Perl
PHP
Plain Text
PL/SQL
Python
Rust
Scala
Shell script
SQL
Tar
Tcl
Troff
UUEncoded
Visual Basic
XML
Zip
Type of analyzer used to filter file types include with selected(e.g. just C sources).
Help
Searched
refs:MCF_IPSBAR
(Results
1 - 10
of
10
) sorted by relevance
/kernel/linux/linux-5.10/arch/m68k/include/asm/
H
A
D
m528xsim.h
24
#define MCFICM_INTC0 (
MCF_IPSBAR
+ 0x0c00) /* Base for Interrupt Ctrl 0 */
25
#define MCFICM_INTC1 (
MCF_IPSBAR
+ 0x0d00) /* Base for Interrupt Ctrl 0 */
63
#define MCFSIM_DCR (
MCF_IPSBAR
+ 0x00000044) /* Control */
64
#define MCFSIM_DACR0 (
MCF_IPSBAR
+ 0x00000048) /* Base address 0 */
65
#define MCFSIM_DMR0 (
MCF_IPSBAR
+ 0x0000004c) /* Address mask 0 */
66
#define MCFSIM_DACR1 (
MCF_IPSBAR
+ 0x00000050) /* Base address 1 */
67
#define MCFSIM_DMR1 (
MCF_IPSBAR
+ 0x00000054) /* Address mask 1 */
72
#define MCFDMA_BASE0 (
MCF_IPSBAR
+ 0x00000100)
73
#define MCFDMA_BASE1 (
MCF_IPSBAR
+ 0x00000140)
74
#define MCFDMA_BASE2 (
MCF_IPSBAR
[all...]
H
A
D
m527xsim.h
24
#define MCFICM_INTC0 (
MCF_IPSBAR
+ 0x0c00) /* Base for Interrupt Ctrl 0 */
25
#define MCFICM_INTC1 (
MCF_IPSBAR
+ 0x0d00) /* Base for Interrupt Ctrl 1 */
72
#define MCFSIM_DCR (
MCF_IPSBAR
+ 0x40) /* Control */
73
#define MCFSIM_DACR0 (
MCF_IPSBAR
+ 0x48) /* Base address 0 */
74
#define MCFSIM_DMR0 (
MCF_IPSBAR
+ 0x4c) /* Address mask 0 */
75
#define MCFSIM_DACR1 (
MCF_IPSBAR
+ 0x50) /* Base address 1 */
76
#define MCFSIM_DMR1 (
MCF_IPSBAR
+ 0x54) /* Address mask 1 */
79
#define MCFSIM_DMR (
MCF_IPSBAR
+ 0x40) /* Mode */
80
#define MCFSIM_DCR (
MCF_IPSBAR
+ 0x44) /* Control */
81
#define MCFSIM_DCFG1 (
MCF_IPSBAR
[all...]
H
A
D
m523xsim.h
24
#define MCFICM_INTC0 (
MCF_IPSBAR
+ 0x0c00) /* Base for Interrupt Ctrl 0 */
25
#define MCFICM_INTC1 (
MCF_IPSBAR
+ 0x0d00) /* Base for Interrupt Ctrl 0 */
63
#define MCFSIM_DCR (
MCF_IPSBAR
+ 0x44) /* Control */
64
#define MCFSIM_DACR0 (
MCF_IPSBAR
+ 0x48) /* Base address 0 */
65
#define MCFSIM_DMR0 (
MCF_IPSBAR
+ 0x4c) /* Address mask 0 */
66
#define MCFSIM_DACR1 (
MCF_IPSBAR
+ 0x50) /* Base address 1 */
67
#define MCFSIM_DMR1 (
MCF_IPSBAR
+ 0x54) /* Address mask 1 */
72
#define MCF_RCR (
MCF_IPSBAR
+ 0x110000)
73
#define MCF_RSR (
MCF_IPSBAR
+ 0x110001)
81
#define MCFUART_BASE0 (
MCF_IPSBAR
[all...]
H
A
D
coldfire.h
46
#define
MCF_IPSBAR
CONFIG_IPSBAR
macro
/kernel/linux/linux-6.6/arch/m68k/include/asm/
H
A
D
m528xsim.h
24
#define MCFICM_INTC0 (
MCF_IPSBAR
+ 0x0c00) /* Base for Interrupt Ctrl 0 */
25
#define MCFICM_INTC1 (
MCF_IPSBAR
+ 0x0d00) /* Base for Interrupt Ctrl 0 */
63
#define MCFSIM_DCR (
MCF_IPSBAR
+ 0x00000044) /* Control */
64
#define MCFSIM_DACR0 (
MCF_IPSBAR
+ 0x00000048) /* Base address 0 */
65
#define MCFSIM_DMR0 (
MCF_IPSBAR
+ 0x0000004c) /* Address mask 0 */
66
#define MCFSIM_DACR1 (
MCF_IPSBAR
+ 0x00000050) /* Base address 1 */
67
#define MCFSIM_DMR1 (
MCF_IPSBAR
+ 0x00000054) /* Address mask 1 */
72
#define MCFDMA_BASE0 (
MCF_IPSBAR
+ 0x00000100)
73
#define MCFDMA_BASE1 (
MCF_IPSBAR
+ 0x00000140)
74
#define MCFDMA_BASE2 (
MCF_IPSBAR
[all...]
H
A
D
m527xsim.h
24
#define MCFICM_INTC0 (
MCF_IPSBAR
+ 0x0c00) /* Base for Interrupt Ctrl 0 */
25
#define MCFICM_INTC1 (
MCF_IPSBAR
+ 0x0d00) /* Base for Interrupt Ctrl 1 */
72
#define MCFSIM_DCR (
MCF_IPSBAR
+ 0x40) /* Control */
73
#define MCFSIM_DACR0 (
MCF_IPSBAR
+ 0x48) /* Base address 0 */
74
#define MCFSIM_DMR0 (
MCF_IPSBAR
+ 0x4c) /* Address mask 0 */
75
#define MCFSIM_DACR1 (
MCF_IPSBAR
+ 0x50) /* Base address 1 */
76
#define MCFSIM_DMR1 (
MCF_IPSBAR
+ 0x54) /* Address mask 1 */
79
#define MCFSIM_DMR (
MCF_IPSBAR
+ 0x40) /* Mode */
80
#define MCFSIM_DCR (
MCF_IPSBAR
+ 0x44) /* Control */
81
#define MCFSIM_DCFG1 (
MCF_IPSBAR
[all...]
H
A
D
m523xsim.h
24
#define MCFICM_INTC0 (
MCF_IPSBAR
+ 0x0c00) /* Base for Interrupt Ctrl 0 */
25
#define MCFICM_INTC1 (
MCF_IPSBAR
+ 0x0d00) /* Base for Interrupt Ctrl 0 */
63
#define MCFSIM_DCR (
MCF_IPSBAR
+ 0x44) /* Control */
64
#define MCFSIM_DACR0 (
MCF_IPSBAR
+ 0x48) /* Base address 0 */
65
#define MCFSIM_DMR0 (
MCF_IPSBAR
+ 0x4c) /* Address mask 0 */
66
#define MCFSIM_DACR1 (
MCF_IPSBAR
+ 0x50) /* Base address 1 */
67
#define MCFSIM_DMR1 (
MCF_IPSBAR
+ 0x54) /* Address mask 1 */
72
#define MCF_RCR (
MCF_IPSBAR
+ 0x110000)
73
#define MCF_RSR (
MCF_IPSBAR
+ 0x110001)
81
#define MCFUART_BASE0 (
MCF_IPSBAR
[all...]
H
A
D
coldfire.h
46
#define
MCF_IPSBAR
CONFIG_IPSBAR
macro
/kernel/linux/linux-5.10/arch/m68k/coldfire/
H
A
D
dma_timer.c
23
#define DTMR0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x400)
24
#define DTXMR0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x402)
25
#define DTER0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x403)
26
#define DTRR0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x404)
27
#define DTCR0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x408)
28
#define DTCN0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x40c)
/kernel/linux/linux-6.6/arch/m68k/coldfire/
H
A
D
dma_timer.c
23
#define DTMR0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x400)
24
#define DTXMR0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x402)
25
#define DTER0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x403)
26
#define DTRR0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x404)
27
#define DTCR0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x408)
28
#define DTCN0 (
MCF_IPSBAR
+ DMA_TIMER_0 + 0x40c)
Completed in 6 milliseconds