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Searched refs:MAX_MSI_IRQS_PER_CTRL (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/pci/controller/dwc/
H A Dpcie-designware-host.c64 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; in dw_handle_msi_irq()
75 while ((pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL, in dw_handle_msi_irq()
76 pos)) != MAX_MSI_IRQS_PER_CTRL) { in dw_handle_msi_irq()
78 (i * MAX_MSI_IRQS_PER_CTRL) + in dw_handle_msi_irq()
134 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_mask()
136 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_mask()
153 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_unmask()
155 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_unmask()
169 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_ack()
171 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_ack()
[all...]
H A Dpci-dra7xx.c219 pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL, 0); in dra7xx_pcie_handle_msi()
220 while (pos != MAX_MSI_IRQS_PER_CTRL) { in dra7xx_pcie_handle_msi()
222 (index * MAX_MSI_IRQS_PER_CTRL) + pos); in dra7xx_pcie_handle_msi()
225 pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL, pos); in dra7xx_pcie_handle_msi()
236 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; in dra7xx_pcie_handle_msi_irq()
413 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dra7xx_pcie_bottom_mask()
415 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dra7xx_pcie_bottom_mask()
433 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dra7xx_pcie_bottom_unmask()
435 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dra7xx_pcie_bottom_unmask()
450 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dra7xx_pcie_bottom_ack()
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H A Dpcie-designware.h149 #define MAX_MSI_IRQS_PER_CTRL 32 macro
150 #define MAX_MSI_CTRLS (MAX_MSI_IRQS / MAX_MSI_IRQS_PER_CTRL)
/kernel/linux/linux-6.6/drivers/pci/controller/dwc/
H A Dpcie-designware-host.c65 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; in dw_handle_msi_irq()
76 while ((pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL, in dw_handle_msi_irq()
77 pos)) != MAX_MSI_IRQS_PER_CTRL) { in dw_handle_msi_irq()
79 (i * MAX_MSI_IRQS_PER_CTRL) + in dw_handle_msi_irq()
134 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_mask()
136 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_mask()
153 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_unmask()
155 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_unmask()
169 ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_ack()
171 bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; in dw_pci_bottom_ack()
[all...]
H A Dpci-dra7xx.c216 pos = find_first_bit(&val, MAX_MSI_IRQS_PER_CTRL); in dra7xx_pcie_handle_msi()
217 while (pos != MAX_MSI_IRQS_PER_CTRL) { in dra7xx_pcie_handle_msi()
219 (index * MAX_MSI_IRQS_PER_CTRL) + pos); in dra7xx_pcie_handle_msi()
221 pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL, pos); in dra7xx_pcie_handle_msi()
232 num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; in dra7xx_pcie_handle_msi_irq()
H A Dpcie-designware.h235 #define MAX_MSI_IRQS_PER_CTRL 32 macro
236 #define MAX_MSI_CTRLS (MAX_MSI_IRQS / MAX_MSI_IRQS_PER_CTRL)

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