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Searched refs:M1 (Results 1 - 25 of 52) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dnv40.c64 int M1 = (coef & 0x000000ff) >> 0; in read_pll_2() local
68 if ((ctrl & 0x80000000) && M1) { in read_pll_2()
69 khz = ref * N1 / M1; in read_pll_2()
125 int *N1, int *M1, int *N2, int *M2, int *log2P) in nv40_clk_calc_pll()
138 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P); in nv40_clk_calc_pll()
151 int N1, M1, N2, M2, log2P; in nv40_clk_calc() local
156 &N1, &M1, &N2, &M2, &log2P); in nv40_clk_calc()
162 clk->npll_coef = (N1 << 8) | M1; in nv40_clk_calc()
165 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_clk_calc()
171 &N1, &M1, NUL in nv40_clk_calc()
124 nv40_clk_calc_pll(struct nv40_clk *clk, u32 reg, u32 khz, int *N1, int *M1, int *N2, int *M2, int *log2P) nv40_clk_calc_pll() argument
[all...]
H A Dpllnv04.c151 int M1, N1, M2, N2, log2P; in getMNP_double() local
164 for (M1 = minM1; M1 <= maxM1; M1++) { in getMNP_double()
165 if (crystal/M1 < minU1) in getMNP_double()
167 if (crystal/M1 > maxU1) in getMNP_double()
171 calcclk1 = crystal * N1 / M1; in getMNP_double()
212 *pM1 = M1; in getMNP_double()
228 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc()
233 ret = getMNP_single(subdev, info, freq, N1, M1, in nv04_pll_calc()
227 nv04_pll_calc(struct nvkm_subdev *subdev, struct nvbios_pll *info, u32 freq, int *N1, int *M1, int *N2, int *M2, int *P) nv04_pll_calc() argument
[all...]
H A Dnv04.c35 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local
36 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P); in nv04_clk_pll_calc()
40 pv->M1 = M1; in nv04_clk_pll_calc()
H A Dpll.h9 int *N1, int *M1, int *N2, int *M2, int *P);
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dpllnv04.c151 int M1, N1, M2, N2, log2P; in getMNP_double() local
164 for (M1 = minM1; M1 <= maxM1; M1++) { in getMNP_double()
165 if (crystal/M1 < minU1) in getMNP_double()
167 if (crystal/M1 > maxU1) in getMNP_double()
171 calcclk1 = crystal * N1 / M1; in getMNP_double()
212 *pM1 = M1; in getMNP_double()
228 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc()
233 ret = getMNP_single(subdev, info, freq, N1, M1, in nv04_pll_calc()
227 nv04_pll_calc(struct nvkm_subdev *subdev, struct nvbios_pll *info, u32 freq, int *N1, int *M1, int *N2, int *M2, int *P) nv04_pll_calc() argument
[all...]
H A Dnv40.c64 int M1 = (coef & 0x000000ff) >> 0; in read_pll_2() local
68 if ((ctrl & 0x80000000) && M1) { in read_pll_2()
69 khz = ref * N1 / M1; in read_pll_2()
125 int *N1, int *M1, int *N2, int *M2, int *log2P) in nv40_clk_calc_pll()
138 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P); in nv40_clk_calc_pll()
151 int N1, M1, N2, M2, log2P; in nv40_clk_calc() local
156 &N1, &M1, &N2, &M2, &log2P); in nv40_clk_calc()
162 clk->npll_coef = (N1 << 8) | M1; in nv40_clk_calc()
165 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_clk_calc()
171 &N1, &M1, NUL in nv40_clk_calc()
124 nv40_clk_calc_pll(struct nv40_clk *clk, u32 reg, u32 khz, int *N1, int *M1, int *N2, int *M2, int *log2P) nv40_clk_calc_pll() argument
[all...]
H A Dnv04.c35 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local
36 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P); in nv04_clk_pll_calc()
40 pv->M1 = M1; in nv04_clk_pll_calc()
H A Dpll.h9 int *N1, int *M1, int *N2, int *M2, int *P);
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dnv50.c41 int N1, M1, N2, M2, P; in nv50_devinit_pll_set() local
50 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv50_devinit_pll_set()
60 nvkm_mask(device, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1); in nv50_devinit_pll_set()
69 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set()
73 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set()
H A Dnv04.c164 if (oldM && pv->M1 && (oldN / oldM < pv->N1 / pv->M1)) in setPLL_single()
363 int N1, M1, N2, M2, P; in nv04_devinit_pll_set() local
370 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv04_devinit_pll_set()
376 pv.M1 = M1; in nv04_devinit_pll_set()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dnv50.c41 int N1, M1, N2, M2, P; in nv50_devinit_pll_set() local
50 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv50_devinit_pll_set()
60 nvkm_mask(device, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1); in nv50_devinit_pll_set()
69 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set()
73 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set()
H A Dnv04.c164 if (oldM && pv->M1 && (oldN / oldM < pv->N1 / pv->M1)) in setPLL_single()
363 int N1, M1, N2, M2, P; in nv04_devinit_pll_set() local
370 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv04_devinit_pll_set()
376 pv.M1 = M1; in nv04_devinit_pll_set()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv40.c40 int N1, M1, N2, M2; in nv40_ram_calc() local
49 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P); in nv40_ram_calc()
57 ram->coef = (N1 << 8) | M1; in nv40_ram_calc()
60 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_ram_calc()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv40.c40 int N1, M1, N2, M2; in nv40_ram_calc() local
49 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P); in nv40_ram_calc()
57 ram->coef = (N1 << 8) | M1; in nv40_ram_calc()
60 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_ram_calc()
/kernel/linux/linux-6.6/arch/arm64/crypto/
H A Dpolyval-ce-core.S39 M1 .req v1 label
223 ld1 {M0.16b, M1.16b, M2.16b, M3.16b}, [MSG], #64
256 karatsuba1 M1 KEY7
278 ld1 {M0.16b, M1.16b, M2.16b, M3.16b}, [MSG], #64
281 karatsuba1 M1 KEY7
287 ld1 {M0.16b, M1.16b}, [MSG], #32
290 karatsuba1 M1 KEY7
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dpll.h9 uint8_t N1, M1, N2, M2; member
11 uint8_t M1, N1, M2, N2;
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dpll.h9 uint8_t N1, M1, N2, M2; member
11 uint8_t M1, N1, M2, N2;
/kernel/linux/linux-5.10/arch/xtensa/variants/dc232b/include/variant/
H A Dtie-asm.h50 rsr \at2, M1
93 wsr \at2, M1
/kernel/linux/linux-5.10/arch/xtensa/variants/de212/include/variant/
H A Dtie-asm.h97 rsr.M1 \at1 // MAC16 option
152 wsr.M1 \at1 // MAC16 option
/kernel/linux/linux-6.6/arch/xtensa/variants/de212/include/variant/
H A Dtie-asm.h97 rsr.M1 \at1 // MAC16 option
152 wsr.M1 \at1 // MAC16 option
/kernel/linux/linux-6.6/arch/xtensa/variants/dc232b/include/variant/
H A Dtie-asm.h50 rsr \at2, M1
93 wsr \at2, M1
/kernel/linux/linux-5.10/arch/xtensa/variants/csp/include/variant/
H A Dtie-asm.h109 rsr.M1 \at1 // MAC16 option
176 wsr.M1 \at1 // MAC16 option
/kernel/linux/linux-5.10/arch/xtensa/variants/dc233c/include/variant/
H A Dtie-asm.h106 rsr \at1, M1 // MAC16 option
171 wsr \at1, M1 // MAC16 option
/kernel/linux/linux-6.6/arch/xtensa/variants/csp/include/variant/
H A Dtie-asm.h109 rsr.M1 \at1 // MAC16 option
176 wsr.M1 \at1 // MAC16 option
/kernel/linux/linux-6.6/arch/xtensa/variants/dc233c/include/variant/
H A Dtie-asm.h106 rsr \at1, M1 // MAC16 option
171 wsr \at1, M1 // MAC16 option

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