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Searched refs:EIR (Results 1 - 25 of 25) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/ethernet/microchip/
H A Dencx24j600.c297 encx24j600_clr_bits(priv, EIR, LINKIF); in encx24j600_int_link_handler()
318 encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF); in encx24j600_tx_complete()
410 eir = encx24j600_read_reg(priv, EIR); in encx24j600_isr()
427 encx24j600_clr_bits(priv, EIR, RXABTIF); in encx24j600_isr()
521 encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF); in encx24j600_hw_init_tx()
561 pr_info(DRV_NAME " EIR: %04X\n", encx24j600_read_reg(priv, EIR)); in encx24j600_dump_config()
656 encx24j600_clr_bits(priv, EIR, (PCFULIF | RXABTIF | TXABTIF | TXIF | in encx24j600_hw_enable()
840 if (encx24j600_read_reg(priv, EIR) & TXABTIF) in encx24j600_hw_tx()
845 encx24j600_clr_bits(priv, EIR, TXI in encx24j600_hw_tx()
[all...]
H A Denc28j60.c199 /* These registers (EIE, EIR, ESTAT, ECON2, ECON1) in enc28j60_set_bank()
535 "Cntrl: ECON1 ECON2 ESTAT EIR EIE\n" in enc28j60_dump_regs()
546 nolock_regb_read(priv, ESTAT), nolock_regb_read(priv, EIR), in enc28j60_dump_regs()
756 nolock_reg_bfclr(priv, EIR, EIR_DMAIF | EIR_LINKIF | in enc28j60_hw_enable()
926 nolock_reg_bfclr(priv, EIR, EIR_RXERIF); in enc28j60_hw_rx()
1133 intflags = locked_regb_read(priv, EIR); in enc28j60_irq_work_handler()
1140 locked_reg_bfclr(priv, EIR, EIR_DMAIF); in enc28j60_irq_work_handler()
1172 locked_reg_bfclr(priv, EIR, EIR_TXIF); in enc28j60_irq_work_handler()
1205 locked_reg_bfclr(priv, EIR, EIR_TXERIF | EIR_TXIF); in enc28j60_irq_work_handler()
1219 locked_reg_bfclr(priv, EIR, EIR_RXERI in enc28j60_irq_work_handler()
[all...]
H A Dencx24j600_hw.h97 #define EIR 0x1C macro
170 /* EIR */
H A Denc28j60_hw.h24 #define EIR 0x1C macro
135 /* ENC28J60 EIR Register Bit Definitions */
H A Dencx24j600-regmap.c324 case EIR: /* Can be modified via single byte cmds */ in encx24j600_regmap_volatile()
/kernel/linux/linux-6.6/drivers/net/ethernet/microchip/
H A Dencx24j600.c296 encx24j600_clr_bits(priv, EIR, LINKIF); in encx24j600_int_link_handler()
317 encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF); in encx24j600_tx_complete()
409 eir = encx24j600_read_reg(priv, EIR); in encx24j600_isr()
426 encx24j600_clr_bits(priv, EIR, RXABTIF); in encx24j600_isr()
520 encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF); in encx24j600_hw_init_tx()
560 pr_info(DRV_NAME " EIR: %04X\n", encx24j600_read_reg(priv, EIR)); in encx24j600_dump_config()
655 encx24j600_clr_bits(priv, EIR, (PCFULIF | RXABTIF | TXABTIF | TXIF | in encx24j600_hw_enable()
839 if (encx24j600_read_reg(priv, EIR) & TXABTIF) in encx24j600_hw_tx()
844 encx24j600_clr_bits(priv, EIR, TXI in encx24j600_hw_tx()
[all...]
H A Denc28j60.c198 /* These registers (EIE, EIR, ESTAT, ECON2, ECON1) in enc28j60_set_bank()
534 "Cntrl: ECON1 ECON2 ESTAT EIR EIE\n" in enc28j60_dump_regs()
545 nolock_regb_read(priv, ESTAT), nolock_regb_read(priv, EIR), in enc28j60_dump_regs()
755 nolock_reg_bfclr(priv, EIR, EIR_DMAIF | EIR_LINKIF | in enc28j60_hw_enable()
925 nolock_reg_bfclr(priv, EIR, EIR_RXERIF); in enc28j60_hw_rx()
1131 intflags = locked_regb_read(priv, EIR); in enc28j60_irq()
1138 locked_reg_bfclr(priv, EIR, EIR_DMAIF); in enc28j60_irq()
1170 locked_reg_bfclr(priv, EIR, EIR_TXIF); in enc28j60_irq()
1203 locked_reg_bfclr(priv, EIR, EIR_TXERIF | EIR_TXIF); in enc28j60_irq()
1217 locked_reg_bfclr(priv, EIR, EIR_RXERI in enc28j60_irq()
[all...]
H A Dencx24j600_hw.h97 #define EIR 0x1C macro
170 /* EIR */
H A Denc28j60_hw.h24 #define EIR 0x1C macro
135 /* ENC28J60 EIR Register Bit Definitions */
H A Dencx24j600-regmap.c324 case EIR: /* Can be modified via single byte cmds */ in encx24j600_regmap_volatile()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A Di915_irq.c913 *eir = intel_uncore_read16(uncore, EIR); in i8xx_error_irq_ack()
914 intel_uncore_write16(uncore, EIR, *eir); in i8xx_error_irq_ack()
916 *eir_stuck = intel_uncore_read16(uncore, EIR); in i8xx_error_irq_ack()
923 * all the EIR bits. Otherwise the edge triggered in i8xx_error_irq_ack()
925 * is still pending. Also some EIR bits can't be in i8xx_error_irq_ack()
938 drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir); in i8xx_error_irq_handler()
941 drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n", in i8xx_error_irq_handler()
953 *eir = intel_uncore_read(&dev_priv->uncore, EIR); in i9xx_error_irq_ack()
954 intel_uncore_write(&dev_priv->uncore, EIR, *eir); in i9xx_error_irq_ack()
956 *eir_stuck = intel_uncore_read(&dev_priv->uncore, EIR); in i9xx_error_irq_ack()
[all...]
H A Dintel_gvt_mmio_table.c1107 MMIO_D(EIR); in iterate_bxt_mmio()
H A Di915_gpu_error.c745 err_printf(m, "EIR: 0x%08x\n", gt->eir); in err_print_gt_global_nonguc()
1813 gt->eir = intel_uncore_read(uncore, EIR); in gt_record_global_nonguc_regs()
H A Di915_reg.h1045 #define EIR _MMIO(0x20b0) macro
/kernel/linux/linux-5.10/drivers/video/fbdev/i810/
H A Di810_regs.h48 #define EIR 0x020B0 macro
H A Di810_accel.c39 "EIR : 0x%04x\n" in i810_report_error()
44 i810_readb(EIR, mmio), in i810_report_error()
/kernel/linux/linux-6.6/drivers/video/fbdev/i810/
H A Di810_regs.h48 #define EIR 0x020B0 macro
H A Di810_accel.c39 "EIR : 0x%04x\n" in i810_report_error()
44 i810_readb(EIR, mmio), in i810_report_error()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
H A Dintel_gt.c178 clear_register(uncore, EIR); in intel_gt_clear_error_registers()
179 eir = intel_uncore_read(uncore, EIR); in intel_gt_clear_error_registers()
185 DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir); in intel_gt_clear_error_registers()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
H A Dintel_gt.c252 intel_uncore_write(uncore, EIR, 0); in intel_gt_clear_error_registers()
253 eir = intel_uncore_read(uncore, EIR); in intel_gt_clear_error_registers()
259 gt_dbg(gt, "EIR stuck: 0x%08x, masking\n", eir); in intel_gt_clear_error_registers()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Di915_irq.c3579 *eir = intel_uncore_read16(uncore, EIR); in i8xx_error_irq_ack()
3582 intel_uncore_write16(uncore, EIR, *eir); in i8xx_error_irq_ack()
3584 *eir_stuck = intel_uncore_read16(uncore, EIR); in i8xx_error_irq_ack()
3591 * all the EIR bits. Otherwise the edge triggered in i8xx_error_irq_ack()
3593 * is still pending. Also some EIR bits can't be in i8xx_error_irq_ack()
3606 DRM_DEBUG("Master Error: EIR 0x%04x\n", eir); in i8xx_error_irq_handler()
3609 drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n", in i8xx_error_irq_handler()
3618 *eir = I915_READ(EIR); in i9xx_error_irq_ack()
3620 I915_WRITE(EIR, *eir); in i9xx_error_irq_ack()
3622 *eir_stuck = I915_READ(EIR); in i9xx_error_irq_ack()
[all...]
H A Di915_gpu_error.c698 err_printf(m, "EIR: 0x%08x\n", gt->eir); in err_print_gt()
1656 gt->eir = intel_uncore_read(uncore, EIR); in gt_record_regs()
H A Di915_reg.h2872 #define EIR _MMIO(0x20b0) macro
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_capture.c84 { EIR, 0, 0, "EIR" }
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c3205 MMIO_D(EIR, D_BXT); in init_bxt_mmio_info()

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