Home
last modified time | relevance | path

Searched refs:DMA_CNTL (Results 1 - 22 of 22) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dsi_dma.c171 dma_cntl = RREG32(DMA_CNTL + sdma_offsets[i]); in si_dma_start()
173 WREG32(DMA_CNTL + sdma_offsets[i], dma_cntl); in si_dma_start()
598 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
600 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
603 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
605 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
614 sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
616 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
619 sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
621 WREG32(DMA_CNTL in si_dma_set_trap_irq_state()
[all...]
H A Dsid.h1897 #define DMA_CNTL 0x340b macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dsi_dma.c169 dma_cntl = RREG32(DMA_CNTL + sdma_offsets[i]); in si_dma_start()
171 WREG32(DMA_CNTL + sdma_offsets[i], dma_cntl); in si_dma_start()
596 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
598 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
601 sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
603 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
612 sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
614 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl); in si_dma_set_trap_irq_state()
617 sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET); in si_dma_set_trap_irq_state()
619 WREG32(DMA_CNTL in si_dma_set_trap_irq_state()
[all...]
H A Dsid.h1897 #define DMA_CNTL 0x340b macro
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dni_dma.c239 dma_cntl = RREG32(DMA_CNTL + reg_offset); in cayman_dma_resume()
241 WREG32(DMA_CNTL + reg_offset, dma_cntl); in cayman_dma_resume()
H A Dr600_dma.c160 dma_cntl = RREG32(DMA_CNTL); in r600_dma_resume()
162 WREG32(DMA_CNTL, dma_cntl); in r600_dma_resume()
H A Dsi.c5962 tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5963 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, tmp); in si_disable_interrupt_state()
5964 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5965 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp); in si_disable_interrupt_state()
6078 dma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6079 dma_cntl1 = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6111 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, dma_cntl); in si_irq_set()
6112 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, dma_cntl1); in si_irq_set()
H A Dr600.c3626 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_disable_interrupt_state()
3627 WREG32(DMA_CNTL, tmp); in r600_disable_interrupt_state()
3808 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_irq_set()
3877 WREG32(DMA_CNTL, dma_cntl); in r600_irq_set()
H A Dnid.h1323 #define DMA_CNTL 0xd02c macro
H A Devergreen.c4472 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4473 WREG32(DMA_CNTL, tmp); in evergreen_disable_interrupt_state()
4519 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4568 WREG32(DMA_CNTL, dma_cntl); in evergreen_irq_set()
H A Dsid.h1833 #define DMA_CNTL 0xd02c macro
H A Devergreend.h1404 #define DMA_CNTL 0xd02c macro
H A Dr600d.h631 #define DMA_CNTL 0xd02c macro
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dr600_dma.c159 dma_cntl = RREG32(DMA_CNTL); in r600_dma_resume()
161 WREG32(DMA_CNTL, dma_cntl); in r600_dma_resume()
H A Dni_dma.c238 dma_cntl = RREG32(DMA_CNTL + reg_offset); in cayman_dma_resume()
240 WREG32(DMA_CNTL + reg_offset, dma_cntl); in cayman_dma_resume()
H A Dsi.c5957 tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5958 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, tmp); in si_disable_interrupt_state()
5959 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5960 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp); in si_disable_interrupt_state()
6073 dma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6074 dma_cntl1 = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6106 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, dma_cntl); in si_irq_set()
6107 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, dma_cntl1); in si_irq_set()
H A Dr600.c3623 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_disable_interrupt_state()
3624 WREG32(DMA_CNTL, tmp); in r600_disable_interrupt_state()
3805 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_irq_set()
3874 WREG32(DMA_CNTL, dma_cntl); in r600_irq_set()
H A Dnid.h1323 #define DMA_CNTL 0xd02c macro
H A Devergreen.c4474 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4475 WREG32(DMA_CNTL, tmp); in evergreen_disable_interrupt_state()
4521 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4570 WREG32(DMA_CNTL, dma_cntl); in evergreen_irq_set()
H A Dsid.h1833 #define DMA_CNTL 0xd02c macro
H A Devergreend.h1404 #define DMA_CNTL 0xd02c macro
H A Dr600d.h631 #define DMA_CNTL 0xd02c macro

Completed in 140 milliseconds