| /kernel/linux/linux-5.10/drivers/dma/ |
| H A D | txx9dmac.h | 73 u64 DAR; /* Destination Address Register */ member
83 u32 DAR; member
207 u64 DAR; member
213 u32 DAR; member
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| H A D | txx9dmac.c | 287 " CHAR: %#llx SAR: %#llx DAR: %#llx CNTR: %#x" in txx9dmac_dump_regs()
291 channel64_readq(dc, DAR), in txx9dmac_dump_regs()
299 " CHAR: %#x SAR: %#x DAR: %#x CNTR: %#x" in txx9dmac_dump_regs()
303 channel32_readl(dc, DAR), in txx9dmac_dump_regs()
317 channel_writeq(dc, DAR, 0); in txx9dmac_reset_chan()
321 channel_writel(dc, DAR, 0); in txx9dmac_reset_chan()
474 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); in txx9dmac_dump_desc()
479 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, in txx9dmac_dump_desc()
487 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
492 d->CHAR, d->SAR, d->DAR, in txx9dmac_dump_desc()
[all...] |
| H A D | idma64.c | 95 channel_writeq(idma64c, DAR, 0); in idma64_chan_start()
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| H A D | pl330.c | 341 DAR, enumerator
732 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); in _emit_MOV()
1401 /* DMAMOV DAR, x->dst_addr */ in _setup_xfer()
1402 off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); in _setup_xfer()
2401 /* If DMAMOV hasn't finished yet, SAR/DAR can be zero */ in pl330_get_current_xferred_count()
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| /kernel/linux/linux-6.6/drivers/dma/ |
| H A D | txx9dmac.h | 73 u64 DAR; /* Destination Address Register */ member
83 u32 DAR; member
207 u64 DAR; member
213 u32 DAR; member
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| H A D | txx9dmac.c | 287 " CHAR: %#llx SAR: %#llx DAR: %#llx CNTR: %#x" in txx9dmac_dump_regs()
291 channel64_readq(dc, DAR), in txx9dmac_dump_regs()
299 " CHAR: %#x SAR: %#x DAR: %#x CNTR: %#x" in txx9dmac_dump_regs()
303 channel32_readl(dc, DAR), in txx9dmac_dump_regs()
317 channel_writeq(dc, DAR, 0); in txx9dmac_reset_chan()
321 channel_writel(dc, DAR, 0); in txx9dmac_reset_chan()
474 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); in txx9dmac_dump_desc()
479 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, in txx9dmac_dump_desc()
487 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
492 d->CHAR, d->SAR, d->DAR, in txx9dmac_dump_desc()
[all...] |
| H A D | idma64.c | 95 channel_writeq(idma64c, DAR, 0); in idma64_chan_start()
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| H A D | pl330.c | 341 DAR, enumerator
732 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); in _emit_MOV()
1401 /* DMAMOV DAR, x->dst_addr */ in _setup_xfer()
1402 off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); in _setup_xfer()
2399 /* If DMAMOV hasn't finished yet, SAR/DAR can be zero */ in pl330_get_current_xferred_count()
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| /kernel/linux/linux-5.10/arch/sh/include/asm/ |
| H A D | dma-register.h | 15 #define DAR 0x04 /* Destination Address Register */ macro
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| /kernel/linux/linux-6.6/arch/sh/include/asm/ |
| H A D | dma-register.h | 15 #define DAR 0x04 /* Destination Address Register */ macro
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| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| H A D | head_32.h | 29 stw r11, DAR(r10)
63 mtspr SPRN_DAR, r11 /* Tag DAR, to be used in DTLB Error */
92 lwz r10, DAR(r12)
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| H A D | head_8xx.S | 37 * Also used for tagging DAR for DTLBerror.
288 mtspr SPRN_DAR, r11 /* Tag DAR */
399 * DAR is set to the calculated address.
454 mtdar r10 /* save ctr reg in DAR */
503 mtctr r11 /* restore ctr reg from DAR */
505 stw r10, DAR(r11)
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| H A D | asm-offsets.c | 129 OFFSET(DAR, thread_struct, dar); in main()
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| H A D | head_32.h | 26 stw r11, DAR(r10)
98 lwz r10, DAR(r12)
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| H A D | head_8xx.S | 57 * Also used for tagging DAR for DTLBerror.
139 mtspr SPRN_DAR, r6 /* Tag DAR, to be used in DTLB Error */
152 mtspr SPRN_DAR, r6 /* Tag DAR, to be used in DTLB Error */
304 mtspr SPRN_DAR, r11 /* Tag DAR */
315 mtspr SPRN_DAR, r11 /* Tag DAR */
350 mtspr SPRN_DAR, r11 /* Tag DAR, to be used in DTLB Error */
361 mtspr SPRN_DAR,r10 /* Tag DAR, to be used in DTLB Error */
421 * DAR is set to the calculated address.
476 mtdar r10 /* save ctr reg in DAR */
525 mtctr r11 /* restore ctr reg from DAR */
[all...] |
| H A D | head_book3s_32.S | 313 stw r11, DAR(r10)
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| H A D | asm-offsets.c | 136 OFFSET(DAR, thread_struct, dar); in main()
345 * The PowerPC 400-class & Book-E processors have neither the DAR in main()
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| /kernel/linux/linux-5.10/drivers/dma/sh/ |
| H A D | shdmac.c | 39 #define DAR 0x04 /* Destination Address Register */ macro
218 sh_dmae_writel(sh_chan, hw->dar, DAR); in dmae_set_reg()
461 u32 dar_buf = sh_dmae_readl(sh_chan, DAR); in sh_dmae_desc_completed()
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| /kernel/linux/linux-6.6/drivers/dma/sh/ |
| H A D | shdmac.c | 38 #define DAR 0x04 /* Destination Address Register */ macro
217 sh_dmae_writel(sh_chan, hw->dar, DAR); in dmae_set_reg()
460 u32 dar_buf = sh_dmae_readl(sh_chan, DAR); in sh_dmae_desc_completed()
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| /kernel/linux/linux-5.10/drivers/dma/dw/ |
| H A D | regs.h | 41 DW_REG(DAR); /* Destination Address Register */
151 #define DWC_CTLL_DST_INC (0<<7) /* DAR update/not */
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| H A D | core.c | 133 " SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n", in dwc_dump_chan_regs()
135 channel_readl(dwc, DAR), in dwc_dump_chan_regs()
164 channel_writel(dwc, DAR, lli_read(desc, dar)); in dwc_do_single_block()
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| /kernel/linux/linux-5.10/arch/sh/drivers/dma/ |
| H A D | dma-sh.c | 217 * It's important that we don't accidentally write any value to SAR/DAR in sh_dmac_xfer_dma()
227 * SAR and DAR, regardless of value, in order for cascading to work. in sh_dmac_xfer_dma()
234 __raw_writel(chan->dar, (dma_base_addr(chan->chan) + DAR)); in sh_dmac_xfer_dma()
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| /kernel/linux/linux-6.6/arch/sh/drivers/dma/ |
| H A D | dma-sh.c | 217 * It's important that we don't accidentally write any value to SAR/DAR in sh_dmac_xfer_dma()
227 * SAR and DAR, regardless of value, in order for cascading to work. in sh_dmac_xfer_dma()
234 __raw_writel(chan->dar, (dma_base_addr(chan->chan) + DAR)); in sh_dmac_xfer_dma()
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| /kernel/linux/linux-6.6/drivers/dma/dw/ |
| H A D | regs.h | 41 DW_REG(DAR); /* Destination Address Register */
151 #define DWC_CTLL_DST_INC (0<<7) /* DAR update/not */
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| H A D | core.c | 130 " SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n", in dwc_dump_chan_regs()
132 channel_readl(dwc, DAR), in dwc_dump_chan_regs()
161 channel_writel(dwc, DAR, lli_read(desc, dar)); in dwc_do_single_block()
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