18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci * 38c2ecf20Sopenharmony_ci * Common header for the legacy SH DMA driver and the new dmaengine driver 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * extracted from arch/sh/include/asm/dma-sh.h: 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Copyright (C) 2000 Takashi YOSHII 88c2ecf20Sopenharmony_ci * Copyright (C) 2003 Paul Mundt 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci#ifndef DMA_REGISTER_H 118c2ecf20Sopenharmony_ci#define DMA_REGISTER_H 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci/* DMA registers */ 148c2ecf20Sopenharmony_ci#define SAR 0x00 /* Source Address Register */ 158c2ecf20Sopenharmony_ci#define DAR 0x04 /* Destination Address Register */ 168c2ecf20Sopenharmony_ci#define TCR 0x08 /* Transfer Count Register */ 178c2ecf20Sopenharmony_ci#define CHCR 0x0C /* Channel Control Register */ 188c2ecf20Sopenharmony_ci#define DMAOR 0x40 /* DMA Operation Register */ 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci/* DMAOR definitions */ 218c2ecf20Sopenharmony_ci#define DMAOR_AE 0x00000004 /* Address Error Flag */ 228c2ecf20Sopenharmony_ci#define DMAOR_NMIF 0x00000002 238c2ecf20Sopenharmony_ci#define DMAOR_DME 0x00000001 /* DMA Master Enable */ 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci/* Definitions for the SuperH DMAC */ 268c2ecf20Sopenharmony_ci#define REQ_L 0x00000000 278c2ecf20Sopenharmony_ci#define REQ_E 0x00080000 288c2ecf20Sopenharmony_ci#define RACK_H 0x00000000 298c2ecf20Sopenharmony_ci#define RACK_L 0x00040000 308c2ecf20Sopenharmony_ci#define ACK_R 0x00000000 318c2ecf20Sopenharmony_ci#define ACK_W 0x00020000 328c2ecf20Sopenharmony_ci#define ACK_H 0x00000000 338c2ecf20Sopenharmony_ci#define ACK_L 0x00010000 348c2ecf20Sopenharmony_ci#define DM_INC 0x00004000 /* Destination addresses are incremented */ 358c2ecf20Sopenharmony_ci#define DM_DEC 0x00008000 /* Destination addresses are decremented */ 368c2ecf20Sopenharmony_ci#define DM_FIX 0x0000c000 /* Destination address is fixed */ 378c2ecf20Sopenharmony_ci#define SM_INC 0x00001000 /* Source addresses are incremented */ 388c2ecf20Sopenharmony_ci#define SM_DEC 0x00002000 /* Source addresses are decremented */ 398c2ecf20Sopenharmony_ci#define SM_FIX 0x00003000 /* Source address is fixed */ 408c2ecf20Sopenharmony_ci#define RS_IN 0x00000200 418c2ecf20Sopenharmony_ci#define RS_OUT 0x00000300 428c2ecf20Sopenharmony_ci#define RS_AUTO 0x00000400 /* Auto Request */ 438c2ecf20Sopenharmony_ci#define RS_ERS 0x00000800 /* DMA extended resource selector */ 448c2ecf20Sopenharmony_ci#define TS_BLK 0x00000040 458c2ecf20Sopenharmony_ci#define TM_BUR 0x00000020 468c2ecf20Sopenharmony_ci#define CHCR_DE 0x00000001 /* DMA Enable */ 478c2ecf20Sopenharmony_ci#define CHCR_TE 0x00000002 /* Transfer End Flag */ 488c2ecf20Sopenharmony_ci#define CHCR_IE 0x00000004 /* Interrupt Enable */ 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci#endif 51