Searched refs:CLCD_TIM2 (Results 1 - 10 of 10) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/pl111/ |
| H A D | pl111_display.c | 171 tim2 = readl(priv->regs + CLCD_TIM2); in pl111_display_enable()
230 writel(tim2, priv->regs + CLCD_TIM2); in pl111_display_enable()
489 u32 tim2 = readl(priv->regs + CLCD_TIM2); in pl111_clk_div_recalc_rate()
512 tim2 = readl(priv->regs + CLCD_TIM2); in pl111_clk_div_set_rate()
523 writel(tim2, priv->regs + CLCD_TIM2); in pl111_clk_div_set_rate()
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| H A D | pl111_debugfs.c | 20 REGDEF(CLCD_TIM2),
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| H A D | pl111_drm.h | 31 #define CLCD_TIM2 0x00000008 macro
148 /* Lock to sync access to CLCD_TIM2 between the common clock
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| /kernel/linux/linux-6.6/drivers/gpu/drm/pl111/ |
| H A D | pl111_display.c | 172 tim2 = readl(priv->regs + CLCD_TIM2); in pl111_display_enable()
231 writel(tim2, priv->regs + CLCD_TIM2); in pl111_display_enable()
489 u32 tim2 = readl(priv->regs + CLCD_TIM2); in pl111_clk_div_recalc_rate()
512 tim2 = readl(priv->regs + CLCD_TIM2); in pl111_clk_div_set_rate()
523 writel(tim2, priv->regs + CLCD_TIM2); in pl111_clk_div_set_rate()
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| H A D | pl111_debugfs.c | 20 REGDEF(CLCD_TIM2),
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| H A D | pl111_drm.h | 31 #define CLCD_TIM2 0x00000008 macro
148 /* Lock to sync access to CLCD_TIM2 between the common clock
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| /kernel/linux/linux-5.10/include/linux/amba/ |
| H A D | clcd-regs.h | 19 #define CLCD_TIM2 0x00000008 macro
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| /kernel/linux/linux-6.6/include/linux/amba/ |
| H A D | clcd-regs.h | 19 #define CLCD_TIM2 0x00000008 macro
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| H A D | amba-clcd.c | 311 writel(regs.tim2, fb->regs + CLCD_TIM2); in clcdfb_set_par()
328 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3), in clcdfb_set_par()
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| /kernel/linux/linux-6.6/drivers/video/fbdev/ |
| H A D | amba-clcd.c | 298 writel(regs.tim2, fb->regs + CLCD_TIM2); in clcdfb_set_par()
315 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3), in clcdfb_set_par()
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