Searched refs:CHCR (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/arch/sh/drivers/dma/ |
| H A D | dma-sh.c | 94 * We determine the correct shift size based off of the CHCR transmit size
105 u32 chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR); in calc_xmit_shift()
123 chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR); in dma_tei()
129 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); in dma_tei()
163 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); in sh_dmac_configure_channel()
174 chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR); in sh_dmac_enable_dma()
180 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); in sh_dmac_enable_dma()
198 chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR); in sh_dmac_disable_dma()
200 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); in sh_dmac_disable_dma()
246 if (!(__raw_readl(dma_base_addr(chan->chan) + CHCR) in sh_dmac_get_dma_residue()
[all...] |
| /kernel/linux/linux-6.6/arch/sh/drivers/dma/ |
| H A D | dma-sh.c | 94 * We determine the correct shift size based off of the CHCR transmit size
105 u32 chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR); in calc_xmit_shift()
123 chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR); in dma_tei()
129 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); in dma_tei()
163 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); in sh_dmac_configure_channel()
174 chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR); in sh_dmac_enable_dma()
180 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); in sh_dmac_enable_dma()
198 chcr = __raw_readl(dma_base_addr(chan->chan) + CHCR); in sh_dmac_disable_dma()
200 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); in sh_dmac_disable_dma()
246 if (!(__raw_readl(dma_base_addr(chan->chan) + CHCR) in sh_dmac_get_dma_residue()
[all...] |
| /kernel/linux/linux-5.10/arch/sh/include/asm/ |
| H A D | dma-register.h | 17 #define CHCR 0x0C /* Channel Control Register */ macro
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| /kernel/linux/linux-6.6/arch/sh/include/asm/ |
| H A D | dma-register.h | 17 #define CHCR 0x0C /* Channel Control Register */ macro
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| /kernel/linux/linux-5.10/drivers/dma/sh/ |
| H A D | shdmac.c | 41 #define CHCR 0x0C /* Channel Control Register */ macro
247 /* If DMA is active, cannot set CHCR. TODO: remove this superfluous check */ in dmae_set_chcr()
757 shdev->chcr_offset = CHCR; in sh_dmae_probe()
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| /kernel/linux/linux-6.6/drivers/dma/sh/ |
| H A D | shdmac.c | 40 #define CHCR 0x0C /* Channel Control Register */ macro
246 /* If DMA is active, cannot set CHCR. TODO: remove this superfluous check */ in dmae_set_chcr()
755 shdev->chcr_offset = CHCR; in sh_dmae_probe()
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