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Searched refs:BIT8 (Results 1 - 25 of 41) sorted by relevance

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/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/include/
H A Drtl8723b_spec.h218 #define IMR_CPWM_8723B BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */
247 #define IMR_RXFOVW_8723B BIT8 /* Receive FIFO Overflow */
H A Dhal_com_reg.h616 #define RRSR_24M BIT8
796 #define IMR_HIGHDOK BIT8 /* High Queue DMA OK Interrupt */
812 #define IMR_CPWM BIT8
844 #define PHIMR_CPWM BIT8
867 #define PHIMR_RXFOVW BIT8
895 #define UHIMR_CPWM BIT8
920 #define UHIMR_RXFOVW BIT8
949 #define IMR_CPWM_88E BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */
978 #define IMR_RXFOVW_88E BIT8 /* Receive FIFO Overflow */
1043 #define RCR_ACRC32 BIT8 /* Accep
[all...]
H A Dosdep_service.h29 #define BIT8 0x00000100 macro
/kernel/linux/linux-6.6/drivers/staging/rtl8723bs/include/
H A Drtl8723b_spec.h206 #define IMR_CPWM_8723B BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */
235 #define IMR_RXFOVW_8723B BIT8 /* Receive FIFO Overflow */
H A Dosdep_service.h25 #define BIT8 0x00000100 macro
H A Dhal_com_reg.h555 #define RRSR_24M BIT8
707 #define IMR_HIGHDOK BIT8 /* High Queue DMA OK Interrupt */
723 #define IMR_CPWM BIT8
754 #define RCR_ACRC32 BIT8 /* Accept CRC32 error packet */
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h39 #define BIT8 0x00000100 macro
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h39 #define BIT8 0x00000100 macro
/kernel/linux/linux-6.6/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h114 #define IMR_HIGHDOK BIT8
189 #define RRSR_24M BIT8
/kernel/linux/linux-5.10/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h220 #define IMR_HIGHDOK BIT8
239 #define TPPoll_HCCAQ BIT8
369 #define RRSR_24M BIT8
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/hal/
H A DHal8723BReg.h400 #define IMR_CPWM_8723B BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */
429 #define IMR_RXFOVW_8723B BIT8 /* Receive FIFO Overflow */
H A Dodm_debug.h69 #define ODM_COMP_PWR_TRAIN BIT8
H A Drtl8723b_phycfg.c167 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1|MaskforPhySet, BIT8); in phy_RFSerialRead_8723B()
169 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhySet, BIT8); in phy_RFSerialRead_8723B()
691 u2tmp = RegRfMod_BW | BIT8; in phy_SetRegBW_8723B()
H A Dodm.h427 ODM_BB_PWR_TRAIN = BIT8,
453 ODM_RTL8723B = BIT8,
536 ODM_WIFI_DISPLAY = BIT8,
/kernel/linux/linux-6.6/drivers/staging/rtl8723bs/hal/
H A DHal8723BReg.h395 #define IMR_CPWM_8723B BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */
424 #define IMR_RXFOVW_8723B BIT8 /* Receive FIFO Overflow */
H A Dodm.h373 ODM_BB_PWR_TRAIN = BIT8,
399 ODM_RTL8723B = BIT8,
H A Drtl8723b_phycfg.c133 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1|MaskforPhySet, BIT8); in phy_RFSerialRead_8723B()
135 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhySet, BIT8); in phy_RFSerialRead_8723B()
/kernel/linux/linux-5.10/drivers/staging/rtl8192e/
H A Drtl819x_Qos.h18 #define BIT8 0x00000100 macro
/kernel/linux/linux-6.6/drivers/staging/rtl8192e/
H A Drtl819x_Qos.h18 #define BIT8 0x00000100 macro
/kernel/linux/linux-5.10/drivers/tty/
H A Dsynclink.c501 #define RXSTATUS_SHORT_FRAME BIT8
502 #define RXSTATUS_CODE_VIOLATION BIT8
563 #define MISCSTATUS_DSR BIT8
586 #define SICR_DSR_INACTIVE BIT8
587 #define SICR_DSR (BIT9|BIT8)
1639 usc_OutDmaReg(info, CDIR, BIT8 | BIT0 ); in mgsl_isr_transmit_dma()
4383 /* Note: must preserve state of BIT8 in DCAR */ in usc_OutDmaReg()
4411 /* Note: must preserve state of BIT8 in DCAR */ in usc_InDmaReg()
4675 RegValue |= BIT9 | BIT8; in usc_set_sdlc_mode()
4677 RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8); in usc_set_sdlc_mode()
[all...]
/kernel/linux/linux-5.10/include/uapi/linux/
H A Dsynclink.h27 #define BIT8 0x0100 macro
/kernel/linux/linux-6.6/include/uapi/linux/
H A Dsynclink.h27 #define BIT8 0x0100 macro
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/
H A Dsynclink.h31 #define BIT8 0x0100 macro
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
H A Dsynclink.h18 #define BIT8 0x0100 macro
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
H A Dsynclink.h31 #define BIT8 0x0100 macro

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