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Searched refs:APMU_DISP1 (Results 1 - 3 of 3) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/mmp/
H A Dclk-mmp2.c50 #define APMU_DISP1 0x110 macro
386 apmu_base + APMU_DISP1, 6, 2, 0, &clk_lock); in mmp2_clk_init()
390 CLK_SET_RATE_PARENT, apmu_base + APMU_DISP1, in mmp2_clk_init()
395 apmu_base + APMU_DISP1, 0x1b, &clk_lock); in mmp2_clk_init()
H A Dclk-of-mmp2.c61 #define APMU_DISP1 0x110 macro
337 {MMP2_CLK_DISP1_MUX, "disp1_mux", disp_parent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP1, 6, 2, 0, &disp1_lock},
352 {0, "disp1_div", "disp1_mux", CLK_SET_RATE_PARENT, APMU_DISP1, 8, 4, CLK_DIVIDER_ONE_BASED, &disp1_lock},
374 {MMP2_CLK_DISP1, "disp1_clk", "disp1_div", CLK_SET_RATE_PARENT, APMU_DISP1, 0x09, 0x09, 0x0, 0, &disp1_lock},
/kernel/linux/linux-6.6/drivers/clk/mmp/
H A Dclk-of-mmp2.c58 #define APMU_DISP1 0x110 macro
336 {MMP2_CLK_DISP1_MUX, "disp1_mux", disp_parent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP1, 6, 2, 0, &disp1_lock},
351 {0, "disp1_div", "disp1_mux", CLK_SET_RATE_PARENT, APMU_DISP1, 8, 4, CLK_DIVIDER_ONE_BASED, &disp1_lock},
373 {MMP2_CLK_DISP1, "disp1_clk", "disp1_div", CLK_SET_RATE_PARENT, APMU_DISP1, 0x09, 0x09, 0x0, 0, &disp1_lock},

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