phy0_rg_faclk0_en (reference) in projects: device - OpenGrok search results

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Searched refs:phy0_rg_faclk0_en (Results 1 - 4 of 4) sorted by relevance

/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/hi3516cv500/mipi_rx/
H A D	mipi_rx_reg.h	`35 unsigned int phy0_rg_faclk0_en : 1; /* [16] */ member`
H A D	mipi_rx_hal.c	`270 phy_mode_link.bits.phy0_rg_faclk0_en = enable; in mipi_rx_set_phy_rg_clk0_en()`
/device/soc/hisilicon/common/platform/mipi_csi/
H A D	mipi_rx_reg.h	`32 unsigned int phy0_rg_faclk0_en : 1; /* [16] */ member`
H A D	mipi_rx_hi2121.c	`274 phyModeLink.bits.phy0_rg_faclk0_en = enable; in MipiRxSetPhyRgClk0En()`

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