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/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_debug_job_fault_backend.c51 int offset = 0; in kbase_debug_job_fault_reg_snapshot_init() local
64 kctx->reg_dump[offset] = GPU_CONTROL_REG(gpu_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
65 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
70 kctx->reg_dump[offset] = JOB_CONTROL_REG(job_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
71 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
77 kctx->reg_dump[offset] = JOB_SLOT_REG(j, job_slot_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
78 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
84 kctx->reg_dump[offset] = MMU_REG(mmu_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
85 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
91 kctx->reg_dump[offset] in kbase_debug_job_fault_reg_snapshot_init()
109 int offset = 0; kbase_job_fault_get_reg_snapshot() local
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_debug_job_fault_backend.c80 int offset = 0; in kbase_debug_job_fault_reg_snapshot_init() local
92 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
94 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
99 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
101 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
107 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
109 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
115 kctx->reg_dump[offset] = MMU_REG(mmu_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
116 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
122 kctx->reg_dump[offset] in kbase_debug_job_fault_reg_snapshot_init()
142 int offset = 0; kbase_job_fault_get_reg_snapshot() local
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_debug_job_fault_backend.c44 int offset = 0; in kbase_debug_job_fault_reg_snapshot_init() local
57 kctx->reg_dump[offset] = GPU_CONTROL_REG(gpu_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
58 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
63 kctx->reg_dump[offset] = JOB_CONTROL_REG(job_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
64 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
70 kctx->reg_dump[offset] = JOB_SLOT_REG(j, job_slot_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
71 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
77 kctx->reg_dump[offset] = MMU_REG(mmu_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
78 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
84 kctx->reg_dump[offset] in kbase_debug_job_fault_reg_snapshot_init()
102 int offset = 0; kbase_job_fault_get_reg_snapshot() local
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_debug_job_fault_backend.c86 int offset = 0; in kbase_debug_job_fault_reg_snapshot_init() local
98 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
100 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
105 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
107 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
113 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
115 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
121 kctx->reg_dump[offset] = MMU_REG(mmu_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
122 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
128 kctx->reg_dump[offset] in kbase_debug_job_fault_reg_snapshot_init()
148 int offset = 0; kbase_job_fault_get_reg_snapshot() local
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/device/soc/rockchip/rk3588/kernel/drivers/net/ethernet/realtek/r8168/
H A Drtltool.c63 my_cmd.data = readb(tp->mmio_addr+my_cmd.offset); in rtl8168_tool_ioctl()
65 my_cmd.data = readw(tp->mmio_addr+(my_cmd.offset&~1)); in rtl8168_tool_ioctl()
67 my_cmd.data = readl(tp->mmio_addr+(my_cmd.offset&~3)); in rtl8168_tool_ioctl()
84 writeb(my_cmd.data, tp->mmio_addr+my_cmd.offset); in rtl8168_tool_ioctl()
86 writew(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~1)); in rtl8168_tool_ioctl()
88 writel(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~3)); in rtl8168_tool_ioctl()
101 my_cmd.data = rtl8168_mdio_prot_read(tp, my_cmd.offset); in rtl8168_tool_ioctl()
116 rtl8168_mdio_prot_write(tp, my_cmd.offset, my_cmd.data); in rtl8168_tool_ioctl()
125 my_cmd.data = rtl8168_ephy_read(tp, my_cmd.offset); in rtl8168_tool_ioctl()
140 rtl8168_ephy_write(tp, my_cmd.offset, my_cm in rtl8168_tool_ioctl()
[all...]
H A Dr8168_asf.c73 switch (asf_usrdata.offset) { in rtl8168_asf_ioctl()
240 void rtl8168_asf_ip_address(struct rtl8168_private *tp, int arg, int offset, unsigned int *data) in rtl8168_asf_ip_address() argument
247 data[i] = rtl8168_eri_read(tp, offset + i, RW_ONE_BYTE, ERIAR_ASF); in rtl8168_asf_ip_address()
250 rtl8168_eri_write(tp, offset + i, RW_ONE_BYTE, data[i], ERIAR_ASF); in rtl8168_asf_ip_address()
252 if (offset == ConsoleIP) in rtl8168_asf_ip_address()
254 else if (offset == IPAddr) in rtl8168_asf_ip_address()
264 void rtl8168_asf_config_regs(struct rtl8168_private *tp, int arg, int offset, unsigned int *data) in rtl8168_asf_config_regs() argument
269 data[ASFCAPABILITY] = (rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF) & data[ASFCONFIG]) ? FUNCTION_ENABLE : FUNCTION_DISABLE; in rtl8168_asf_config_regs()
271 value = rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF); in rtl8168_asf_config_regs()
278 rtl8168_eri_write(tp, offset, RW_ONE_BYT in rtl8168_asf_config_regs()
282 rtl8168_asf_capability_masks(struct rtl8168_private *tp, int arg, int offset, unsigned int *data) rtl8168_asf_capability_masks() argument
332 rtl8168_asf_time_period(struct rtl8168_private *tp, int arg, int offset, unsigned int *data) rtl8168_asf_time_period() argument
352 rtl8168_asf_key_access(struct rtl8168_private *tp, int arg, int offset, unsigned int *data) rtl8168_asf_key_access() argument
380 rtl8168_asf_rw_hexadecimal(struct rtl8168_private *tp, int arg, int offset, int len, unsigned int *data) rtl8168_asf_rw_hexadecimal() argument
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/pinctrl/
H A Dpinctrl-rk805.c267 static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset) in rk805_gpio_get() argument
272 if (!pci->pin_cfg[offset].val_msk) { in rk805_gpio_get()
273 dev_dbg(pci->dev, "getting gpio%d value is not support\n", offset); in rk805_gpio_get()
277 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val); in rk805_gpio_get()
279 dev_err(pci->dev, "get gpio%d value failed\n", offset); in rk805_gpio_get()
283 return !!(val & pci->pin_cfg[offset].val_msk); in rk805_gpio_get()
286 static void rk805_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) in rk805_gpio_set() argument
290 if (!pci->pin_cfg[offset].val_msk) { in rk805_gpio_set()
293 ret = regmap_update_bits(pci->rk808->regmap, pci->pin_cfg[offset].reg, pci->pin_cfg[offset] in rk805_gpio_set()
300 rk805_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) rk805_gpio_direction_input() argument
305 rk805_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) rk805_gpio_direction_output() argument
311 rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) rk805_gpio_get_direction() argument
436 _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned int offset, int mux) _rk805_pinctrl_set_mux() argument
466 _rk817_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned int offset, int mux) _rk817_pinctrl_set_mux() argument
488 int offset = group; rk805_pinctrl_set_mux() local
504 rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset, bool input) rk805_pmx_gpio_set_direction() argument
525 rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset) rk805_pinctrl_gpio_request_enable() argument
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/pinctrl/
H A Dpinctrl-rk806.c195 static int rk806_gpio_get(struct gpio_chip *chip, unsigned int offset) in rk806_gpio_get() argument
200 if (!pci->pin_cfg[offset].val_msk) { in rk806_gpio_get()
202 offset); in rk806_gpio_get()
206 ret = regmap_read(pci->rk806->regmap, pci->pin_cfg[offset].reg, &val); in rk806_gpio_get()
208 dev_err(pci->dev, "get gpio%d value failed\n", offset); in rk806_gpio_get()
212 return !!(val & pci->pin_cfg[offset].val_msk); in rk806_gpio_get()
216 unsigned int offset, in rk806_gpio_set()
222 if (!pci->pin_cfg[offset].val_msk) in rk806_gpio_set()
226 pci->pin_cfg[offset].reg, in rk806_gpio_set()
227 pci->pin_cfg[offset] in rk806_gpio_set()
215 rk806_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) rk806_gpio_set() argument
234 rk806_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) rk806_gpio_direction_input() argument
240 rk806_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) rk806_gpio_direction_output() argument
248 rk806_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) rk806_gpio_get_direction() argument
349 _rk806_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned int offset, int mux) _rk806_pinctrl_set_mux() argument
376 int offset = group; rk806_pinctrl_set_mux() local
381 rk806_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset, bool input) rk806_pmx_gpio_set_direction() argument
404 rk806_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset) rk806_pinctrl_gpio_request_enable() argument
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/osal/include/
H A Ddrv_osal_lib.h280 * \param[in] offset The module id.
283 hi_u32 module_reg_read(module_id id, hi_u32 offset);
298 hi_void module_reg_write(module_id id, hi_u32 offset, hi_u32 val);
301 #define symc_read(offset) module_reg_read(CRYPTO_MODULE_ID_SYMC, offset)
302 #define symc_write(offset, val) module_reg_write(CRYPTO_MODULE_ID_SYMC, offset, val)
305 #define hash_read(offset) module_reg_read(CRYPTO_MODULE_ID_HASH, offset)
306 #define hash_write(offset, va
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/device/soc/rockchip/common/vendor/drivers/rockchip/
H A Dmtd_vendor_storage.c34 u16 offset; member
126 int err, offset; in mtd_vendor_storage_init() local
141 for (offset = 0; offset < mtd->size; offset += mtd->erasesize) { in mtd_vendor_storage_init()
142 if (!mtd_block_isbad(mtd, offset)) { in mtd_vendor_storage_init()
143 err = mtd_read(mtd, offset, sizeof(*g_vendor), &bytes_read, (u8 *)g_vendor); in mtd_vendor_storage_init()
151 nand_info.blk_offset = offset; in mtd_vendor_storage_init()
154 } else if (nand_info.blk_offset == offset) { in mtd_vendor_storage_init()
160 for (offset in mtd_vendor_storage_init()
227 u32 offset, next_size; mtd_vendor_write() local
[all...]
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/oam/
H A Doam_log.c61 hi_s32 offset; in oal_print_nlogs() local
75 offset = snprintf_s(buffer, OAM_PRINT_FORMAT_LENGTH, OAM_PRINT_FORMAT_LENGTH - 1, "[%d][%s:%d]", in oal_print_nlogs()
77 if (offset == -1) { in oal_print_nlogs()
82 tmp = vsprintf_s(buffer + offset, OAM_PRINT_FORMAT_LENGTH - offset - 1, fmt, args); in oal_print_nlogs()
89 offset = offset + tmp; in oal_print_nlogs()
90 if (snprintf_s(buffer + offset, in oal_print_nlogs()
91 OAM_PRINT_FORMAT_LENGTH - offset, OAM_PRINT_FORMAT_LENGTH - offset in oal_print_nlogs()
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/upg/
H A Dboot_upg_tool.c26 hi_u32 kernel_comprss_flash_read(hi_u32 offset, hi_u8 *buffer, hi_u32 size) in kernel_comprss_flash_read() argument
30 ret = crypto_kernel_read(g_compress_src_addr, offset, buffer, size); in kernel_comprss_flash_read()
35 ret = hi_flash_read(g_compress_src_addr + offset, size, buffer); in kernel_comprss_flash_read()
44 hi_u32 kernel_comprss_flash_write(hi_u32 offset, hi_u8 *buffer, hi_u32 size) in kernel_comprss_flash_write() argument
50 ret = crypto_kernel_write(g_compress_dst_addr, offset, buffer, size); in kernel_comprss_flash_write()
55 ret = hi_flash_write(g_compress_dst_addr + offset, size, buffer, HI_FALSE); in kernel_comprss_flash_write()
63 hi_u32 kernel_comprss_flash_hash(hi_u32 offset, hi_u8 *buffer, hi_u32 size) in kernel_comprss_flash_hash() argument
69 if (offset >= sizeof(hi_upg_file_head)) { in kernel_comprss_flash_hash()
74 boot_msg4("code hash ret-size-offset-headsize", ret, size, offset, hash_siz in kernel_comprss_flash_hash()
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/device/backend/
H A Dmali_kbase_device_hw_csf.c183 static bool kbase_is_register_accessible(u32 offset) in kbase_is_register_accessible() argument
186 if (((offset >= MCU_SUBSYSTEM_BASE) && (offset < IPA_CONTROL_BASE)) || in kbase_is_register_accessible()
187 ((offset >= GPU_CONTROL_MCU_BASE) && (offset < USER_BASE))) { in kbase_is_register_accessible()
188 WARN(1, "Invalid register offset 0x%x", offset); in kbase_is_register_accessible()
196 void kbase_reg_write(struct kbase_device *kbdev, u32 offset, u32 value) in kbase_reg_write() argument
201 if (!kbase_is_register_accessible(offset)) in kbase_reg_write()
204 writel(value, kbdev->reg + offset); in kbase_reg_write()
215 kbase_reg_read(struct kbase_device *kbdev, u32 offset) kbase_reg_read() argument
[all...]
H A Dmali_kbase_device_hw_jm.c102 void kbase_reg_write(struct kbase_device *kbdev, u32 offset, u32 value) in kbase_reg_write() argument
107 writel(value, kbdev->reg + offset); in kbase_reg_write()
111 kbase_io_history_add(&kbdev->io_history, kbdev->reg + offset, in kbase_reg_write()
114 dev_dbg(kbdev->dev, "w: reg %08x val %08x", offset, value); in kbase_reg_write()
118 u32 kbase_reg_read(struct kbase_device *kbdev, u32 offset) in kbase_reg_read() argument
125 val = readl(kbdev->reg + offset); in kbase_reg_read()
129 kbase_io_history_add(&kbdev->io_history, kbdev->reg + offset, in kbase_reg_read()
132 dev_dbg(kbdev->dev, "r: reg %08x val %08x", offset, val); in kbase_reg_read()
/device/soc/hisilicon/hi3751v350/sdk_linux/source/common/drv/mmz/
H A Ddrv_mmz_intf.c80 HI_SIZE_T offset = 0; in remap_mmb() local
88 offset = addr - mmb->iommu_addr; in remap_mmb()
90 offset = addr - mmb->phys_addr; in remap_mmb()
97 return (void *)((uintptr_t) virt + offset); in remap_mmb()
103 HI_SIZE_T offset = 0; in remap_mmb_cached() local
111 offset = addr - mmb->iommu_addr; in remap_mmb_cached()
113 offset = addr - mmb->phys_addr; in remap_mmb_cached()
120 return (void *)((uintptr_t) virt + offset); in remap_mmb_cached()
231 HI_U32 offset; in get_nonsecsmmu_by_secsmmu() local
237 offset in get_nonsecsmmu_by_secsmmu()
248 HI_U32 offset; get_phys_by_secsmmu() local
265 HI_U32 offset; get_sec_smmu_by_phys() local
282 HI_U32 offset; get_sec_smmu_by_nosmmu() local
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/tty/serial/8250/
H A D8250_dw.c77 static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value) in dw8250_modify_msr() argument
82 if (offset == UART_MSR) { in dw8250_modify_msr()
100 void __iomem *offset = p->membase + (UART_LCR << p->regshift); in dw8250_check_lcr() local
114 __raw_writeq(value & 0xff, offset); in dw8250_check_lcr()
118 writel(value, offset); in dw8250_check_lcr()
120 iowrite32be(value, offset); in dw8250_check_lcr()
122 writeb(value, offset); in dw8250_check_lcr()
156 static void dw8250_serial_out38x(struct uart_port *p, int offset, int value) in dw8250_serial_out38x() argument
161 if (offset == UART_LCR) { in dw8250_serial_out38x()
165 writeb(value, p->membase + (offset << in dw8250_serial_out38x()
172 dw8250_serial_out(struct uart_port *p, int offset, int value) dw8250_serial_out() argument
183 dw8250_serial_in(struct uart_port *p, int offset) dw8250_serial_in() argument
191 dw8250_serial_inq(struct uart_port *p, int offset) dw8250_serial_inq() argument
200 dw8250_serial_outq(struct uart_port *p, int offset, int value) dw8250_serial_outq() argument
215 dw8250_serial_out32(struct uart_port *p, int offset, int value) dw8250_serial_out32() argument
226 dw8250_serial_in32(struct uart_port *p, int offset) dw8250_serial_in32() argument
233 dw8250_serial_out32be(struct uart_port *p, int offset, int value) dw8250_serial_out32be() argument
244 dw8250_serial_in32be(struct uart_port *p, int offset) dw8250_serial_in32be() argument
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/sample/taurus/ai_sample/scenario/cnn_trash_classify/
H A Dcnn_trash_classify.c186 HI_S32 offset = 0; in CnnTrashClassifyFlag() local
189 offset += snprintf_s(buf + offset, size - offset, size - offset - 1, "trash classify: {"); in CnnTrashClassifyFlag()
230 offset += snprintf_s(buf + offset, size - offset, size - offset - 1, in CnnTrashClassifyFlag()
232 HI_ASSERT(offset < siz in CnnTrashClassifyFlag()
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/csf/
H A Dmali_kbase_csf_firmware.h62 /* Size of HW Doorbell page, used to calculate the offset to subsequent pages */
135 * @offset: Offset of the word to be written, in bytes.
138 void kbase_csf_firmware_cs_input(const struct kbase_csf_cmd_stream_info *info, u32 offset, u32 value);
147 * @offset: Offset of the word to be read, in bytes.
149 u32 kbase_csf_firmware_cs_input_read(const struct kbase_csf_cmd_stream_info *const info, const u32 offset);
156 * @offset: Offset of the word to be modified, in bytes.
160 void kbase_csf_firmware_cs_input_mask(const struct kbase_csf_cmd_stream_info *info, u32 offset, u32 value, u32 mask);
169 * @offset: Offset of the word to be read, in bytes.
171 u32 kbase_csf_firmware_cs_output(const struct kbase_csf_cmd_stream_info *info, u32 offset);
208 * @offset
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/mali400/ump/linux/
H A Dump_osk_low_level_mem.c190 _mali_osk_errcode_t _ump_osk_mem_mapregion_map(ump_memory_allocation *descriptor, u32 offset, u32 *phys_addr, unsigned long size) in _ump_osk_mem_mapregion_map() argument
201 retval = remap_pfn_range(vma, ((u32)descriptor->mapping) + offset, (*phys_addr) >> PAGE_SHIFT, size, vma->vm_page_prot) ? _MALI_OSK_ERR_FAULT : _MALI_OSK_ERR_OK;; in _ump_osk_mem_mapregion_map()
206 (unsigned long)(vma->vm_start + offset), in _ump_osk_mem_mapregion_map()
220 void _ump_osk_msync(ump_dd_mem *mem, void *virt, u32 offset, u32 size, ump_uk_msync_op op, ump_session_data *session_data) in _ump_osk_msync() argument
257 mem->secure_id, mem->nr_blocks, mem->size_bytes, size, offset, mem->block_array[0].addr)); in _ump_osk_msync()
267 if (offset >= block->size) { in _ump_osk_msync()
268 offset -= block->size; in _ump_osk_msync()
272 if (offset) { in _ump_osk_msync()
273 start_p = (u32)block->addr + offset; in _ump_osk_msync()
274 /* We'll zero the offset late in _ump_osk_msync()
[all...]
/device/soc/rockchip/common/vendor/drivers/gpio/
H A Dgpio-rockchip.c72 static inline void rockchip_gpio_writel(struct rockchip_pin_bank *bank, u32 value, unsigned int offset) in rockchip_gpio_writel() argument
74 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_writel()
83 static inline u32 rockchip_gpio_readl(struct rockchip_pin_bank *bank, unsigned int offset) in rockchip_gpio_readl() argument
85 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_readl()
97 static inline void rockchip_gpio_writel_bit(struct rockchip_pin_bank *bank, u32 bit, u32 value, unsigned int offset) in rockchip_gpio_writel_bit() argument
99 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_writel_bit()
119 static inline u32 rockchip_gpio_readl_bit(struct rockchip_pin_bank *bank, u32 bit, unsigned int offset) in rockchip_gpio_readl_bit() argument
121 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_readl_bit()
135 static void rockchip_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) in rockchip_gpio_set() argument
141 rockchip_gpio_writel_bit(bank, offset, valu in rockchip_gpio_set()
145 rockchip_gpio_get(struct gpio_chip *gc, unsigned int offset) rockchip_gpio_get() argument
151 data >>= offset; rockchip_gpio_get() local
157 rockchip_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) rockchip_gpio_get_direction() argument
167 rockchip_gpio_set_direction(struct gpio_chip *chip, unsigned int offset, bool input) rockchip_gpio_set_direction() argument
177 rockchip_gpio_direction_input(struct gpio_chip *gc, unsigned int offset) rockchip_gpio_direction_input() argument
182 rockchip_gpio_direction_output(struct gpio_chip *gc, unsigned int offset, int value) rockchip_gpio_direction_output() argument
189 rockchip_gpio_set_debounce(struct gpio_chip *gc, unsigned int offset, unsigned int debounce) rockchip_gpio_set_debounce() argument
253 rockchip_gpio_set_config(struct gpio_chip *gc, unsigned int offset, unsigned long config) rockchip_gpio_set_config() argument
287 rockchip_gpio_to_irq(struct gpio_chip *gc, unsigned int offset) rockchip_gpio_to_irq() argument
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/gpio/
H A Dgpio-rockchip.c72 static inline void rockchip_gpio_writel(struct rockchip_pin_bank *bank, u32 value, unsigned int offset) in rockchip_gpio_writel() argument
74 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_writel()
83 static inline u32 rockchip_gpio_readl(struct rockchip_pin_bank *bank, unsigned int offset) in rockchip_gpio_readl() argument
85 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_readl()
97 static inline void rockchip_gpio_writel_bit(struct rockchip_pin_bank *bank, u32 bit, u32 value, unsigned int offset) in rockchip_gpio_writel_bit() argument
99 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_writel_bit()
119 static inline u32 rockchip_gpio_readl_bit(struct rockchip_pin_bank *bank, u32 bit, unsigned int offset) in rockchip_gpio_readl_bit() argument
121 void __iomem *reg = bank->reg_base + offset; in rockchip_gpio_readl_bit()
135 static void rockchip_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) in rockchip_gpio_set() argument
141 rockchip_gpio_writel_bit(bank, offset, valu in rockchip_gpio_set()
145 rockchip_gpio_get(struct gpio_chip *gc, unsigned int offset) rockchip_gpio_get() argument
151 data >>= offset; rockchip_gpio_get() local
157 rockchip_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) rockchip_gpio_get_direction() argument
167 rockchip_gpio_set_direction(struct gpio_chip *chip, unsigned int offset, bool input) rockchip_gpio_set_direction() argument
177 rockchip_gpio_direction_input(struct gpio_chip *gc, unsigned int offset) rockchip_gpio_direction_input() argument
182 rockchip_gpio_direction_output(struct gpio_chip *gc, unsigned int offset, int value) rockchip_gpio_direction_output() argument
189 rockchip_gpio_set_debounce(struct gpio_chip *gc, unsigned int offset, unsigned int debounce) rockchip_gpio_set_debounce() argument
256 rockchip_gpio_set_config(struct gpio_chip *gc, unsigned int offset, unsigned long config) rockchip_gpio_set_config() argument
290 rockchip_gpio_to_irq(struct gpio_chip *gc, unsigned int offset) rockchip_gpio_to_irq() argument
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/csf/
H A Dmali_kbase_csf_firmware_no_mali.c106 static inline u32 input_page_read(const u32 *const input, const u32 offset) in input_page_read() argument
108 WARN_ON(offset % sizeof(u32)); in input_page_read()
110 return input[offset / sizeof(u32)]; in input_page_read()
113 static inline void input_page_write(u32 *const input, const u32 offset, in input_page_write() argument
116 WARN_ON(offset % sizeof(u32)); in input_page_write()
118 input[offset / sizeof(u32)] = value; in input_page_write()
121 static inline u32 output_page_read(const u32 *const output, const u32 offset) in output_page_read() argument
123 WARN_ON(offset % sizeof(u32)); in output_page_read()
125 return output[offset / sizeof(u32)]; in output_page_read()
128 static inline void output_page_write(u32 *const output, const u32 offset, in output_page_write() argument
275 kbase_csf_firmware_cs_input( const struct kbase_csf_cmd_stream_info *const info, const u32 offset, const u32 value) kbase_csf_firmware_cs_input() argument
290 kbase_csf_firmware_cs_input_read( const struct kbase_csf_cmd_stream_info *const info, const u32 offset) kbase_csf_firmware_cs_input_read() argument
301 kbase_csf_firmware_cs_input_mask( const struct kbase_csf_cmd_stream_info *const info, const u32 offset, const u32 value, const u32 mask) kbase_csf_firmware_cs_input_mask() argument
314 kbase_csf_firmware_cs_output( const struct kbase_csf_cmd_stream_info *const info, const u32 offset) kbase_csf_firmware_cs_output() argument
324 kbase_csf_firmware_csg_input( const struct kbase_csf_cmd_stream_group_info *const info, const u32 offset, const u32 value) kbase_csf_firmware_csg_input() argument
340 kbase_csf_firmware_csg_input_read( const struct kbase_csf_cmd_stream_group_info *const info, const u32 offset) kbase_csf_firmware_csg_input_read() argument
351 kbase_csf_firmware_csg_input_mask( const struct kbase_csf_cmd_stream_group_info *const info, const u32 offset, const u32 value, const u32 mask) kbase_csf_firmware_csg_input_mask() argument
364 kbase_csf_firmware_csg_output( const struct kbase_csf_cmd_stream_group_info *const info, const u32 offset) kbase_csf_firmware_csg_output() argument
407 kbase_csf_firmware_global_input( const struct kbase_csf_global_iface *const iface, const u32 offset, const u32 value) kbase_csf_firmware_global_input() argument
424 kbase_csf_firmware_global_input_mask( const struct kbase_csf_global_iface *const iface, const u32 offset, const u32 value, const u32 mask) kbase_csf_firmware_global_input_mask() argument
438 kbase_csf_firmware_global_input_read( const struct kbase_csf_global_iface *const iface, const u32 offset) kbase_csf_firmware_global_input_read() argument
448 kbase_csf_firmware_global_output( const struct kbase_csf_global_iface *const iface, const u32 offset) kbase_csf_firmware_global_output() argument
[all...]
H A Dmali_kbase_csf_firmware.h61 /* Size of HW Doorbell page, used to calculate the offset to subsequent pages */
134 * @offset: Offset of the word to be written, in bytes.
138 const struct kbase_csf_cmd_stream_info *info, u32 offset, u32 value);
146 * @offset: Offset of the word to be read, in bytes.
149 const struct kbase_csf_cmd_stream_info *const info, const u32 offset);
155 * @offset: Offset of the word to be modified, in bytes.
160 const struct kbase_csf_cmd_stream_info *info, u32 offset,
169 * @offset: Offset of the word to be read, in bytes.
172 const struct kbase_csf_cmd_stream_info *info, u32 offset);
207 * @offset
[all...]
/device/qemu/riscv32_virt/liteos_m/board/driver/cfiflash/
H A Dcfiflash.c211 int32_t CfiFlashRead(uint32_t pdrv, uint32_t *buffer, uint32_t offset, uint32_t nbytes) in CfiFlashRead() argument
215 if ((offset + nbytes) > CFIFLASH_CAPACITY) { in CfiFlashRead()
216 PRINT_ERR("flash over read, offset:%d, nbytes:%d\n", offset, nbytes); in CfiFlashRead()
227 unsigned int wordOffset = B2W(offset); in CfiFlashRead()
237 int32_t CfiFlashWrite(uint32_t pdrv, const uint32_t *buffer, uint32_t offset, uint32_t nbytes) in CfiFlashWrite() argument
239 if ((offset + nbytes) > CFIFLASH_CAPACITY) { in CfiFlashWrite()
240 PRINT_ERR("flash over write, offset:%d, nbytes:%d\n", offset, nbytes); in CfiFlashWrite()
251 unsigned int wordOffset = B2W(offset); in CfiFlashWrite()
260 CfiFlashErase(uint32_t pdrv, uint32_t offset) CfiFlashErase() argument
[all...]
/device/soc/rockchip/common/hardware/mpp/include/
H A Dmpp_buffer.h226 #define mpp_buffer_read(buffer, offset, data, size) \
227 mpp_buffer_read_with_caller(buffer, offset, data, size, __FUNCTION__)
229 #define mpp_buffer_write(buffer, offset, data, size) \
230 mpp_buffer_write_with_caller(buffer, offset, data, size, __FUNCTION__)
244 #define mpp_buffer_set_offset(buffer, offset) mpp_buffer_set_offset_with_caller(buffer, offset, __FUNCTION__)
273 MPP_RET mpp_buffer_read_with_caller(MppBuffer buffer, size_t offset, void *data, size_t size, const char *caller);
274 MPP_RET mpp_buffer_write_with_caller(MppBuffer buffer, size_t offset, void *data, size_t size, const char *caller);
281 MPP_RET mpp_buffer_set_offset_with_caller(MppBuffer buffer, size_t offset, const char *caller);

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