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Searched refs:layout (Results 1 - 12 of 12) sorted by relevance

/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/
H A Ddrv_hdmi_dfm.h103 hi_s32 layout; member
H A Ddrv_hdmi_common.h865 hdmi_audio_ch layout; member
939 hdmi_audio_ch layout; member
H A Ddrv_hdmi_dfm.c60 if (in->layout == 0) { in dfm_get_audio_ap()
H A Ddrv_hdmi_frl.c220 dfm->layout = (ao_attr->channels > HDMI_AUDIO_FORMAT_2CH) ? HI_TRUE : HI_FALSE; in frl_dfm_construct()
H A Ddrv_hdmi_proc.c1136 index = min((hi_s32)hw_status->audio_status.layout, HDMI_AUDIO_FORMAT_BUTT); in proc_audio_path()
H A Ddrv_hdmi_intf.c976 audio_attr->channels = hw_status.audio_status.layout;
1869 audio_cfg.layout = ao_attr->channels;
/device/soc/rockchip/rk3568/hardware/display/src/display_gralloc/
H A Ddisplay_buffer_vdi_impl.cpp114 int32_t DisplayBufferVdiImpl::GetImageLayout(const BufferHandle& handle, ImageLayout& layout) const in GetImageLayout()
H A Ddisplay_buffer_vdi_impl.h47 virtual int32_t GetImageLayout(const BufferHandle& handle, Display::Buffer::V1_2::ImageLayout& layout) const override;
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/hal/ctrl/hisiv100/
H A Dhdmi_hal_intf.c392 hw_status->audio_status.layout = audio_stat.channel_num; in hal_hdmi_hw_audio_status_get()
547 audio_path.channel_num = audio_cfg->layout; in hal_hdmi_audio_path_set()
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/
H A Ddrm_modes.c802 * the appropriate layout.
874 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; in drm_mode_set_crtcinfo() local
876 switch (layout) { in drm_mode_set_crtcinfo()
1062 * don't check the pixel clocks nor the stereo layout.
H A Ddrm_edid.c5946 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK; in s3d_structure_from_display_mode() local
5948 switch (layout) { in s3d_structure_from_display_mode()
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c1186 u8 layout; in dw_hdmi_set_channel_count() local
1191 * For >2 channel PCM audio, we need to select layout 1 in dw_hdmi_set_channel_count()
1195 layout = HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1; in dw_hdmi_set_channel_count()
1197 layout = HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0; in dw_hdmi_set_channel_count()
1200 hdmi_modb(hdmi, layout, HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK, HDMI_FC_AUDSCONF); in dw_hdmi_set_channel_count()
1912 * information the DWC MHL PHY has the same register layout and is thus also

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