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/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/product/hi3516cv500/
H A Dhdmi_product_define.c72 hi_void drv_hdmi_prod_crg_gate_set(hi_bool enable) in drv_hdmi_prod_crg_gate_set() argument
77 hdmi_reg_ssc_in_cken_set(enable); in drv_hdmi_prod_crg_gate_set()
78 hdmi_reg_ssc_bypass_cken_set(enable); in drv_hdmi_prod_crg_gate_set()
79 hdmi_reg_ctrl_osc_24m_cken_set(enable); in drv_hdmi_prod_crg_gate_set()
80 hdmi_reg_ctrl_cec_cken_set(enable); in drv_hdmi_prod_crg_gate_set()
81 hdmi_reg_ctrl_os_cken_set(enable); in drv_hdmi_prod_crg_gate_set()
82 hdmi_reg_ctrl_as_cken_set(enable); in drv_hdmi_prod_crg_gate_set()
83 hdmi_reg_pxl_cken_set(enable); in drv_hdmi_prod_crg_gate_set()
85 hdmi_reg_hdmirx_phy_tmds_cken_set(enable); in drv_hdmi_prod_crg_gate_set()
91 hi_void drv_hdmi_prod_crg_all_reset_set(hi_bool enable) in drv_hdmi_prod_crg_all_reset_set() argument
144 drv_hdmi_low_power_set(hi_bool enable) drv_hdmi_low_power_set() argument
150 drv_hdmi_prod_crg_phy_reset_set(hi_bool enable) drv_hdmi_prod_crg_phy_reset_set() argument
164 drv_hdmi_prod_crg_phy_reset_get(hi_bool *enable) drv_hdmi_prod_crg_phy_reset_get() argument
[all...]
/device/soc/hisilicon/common/platform/mtd/hifmc100/spi_nor/
H A Dw25qh.c25 int32_t HifmcCntlrSpinorEntry4AddrW25qh(struct SpiFlash *spi, int enable) in HifmcCntlrSpinorEntry4AddrW25qh() argument
36 enable = !!enable; // make it 0 or 1 in HifmcCntlrSpinorEntry4AddrW25qh()
37 HDF_LOGD("%s: start spinor flash 4-byte mode %s", __func__, (enable == 1) ? "enable" : "disbale"); in HifmcCntlrSpinorEntry4AddrW25qh()
46 if ((status & 0x1) == enable) { in HifmcCntlrSpinorEntry4AddrW25qh()
47 HDF_LOGD("%s: 4byte status:%#x, enable:%d", __func__, status, enable); in HifmcCntlrSpinorEntry4AddrW25qh()
51 reg = (enable == 1) ? MTD_SPI_CMD_EN4B : MTD_SPI_CMD_FIRST_RESET_4ADDR; in HifmcCntlrSpinorEntry4AddrW25qh()
63 if (enable in HifmcCntlrSpinorEntry4AddrW25qh()
98 int enable; HifmcCntlrSpinorQeEnableW25qh() local
[all...]
H A Dmx25l.c27 int enable; in HifmcCntlrSpinorQeEnableMx25l() local
35 enable = ((spi->writeCfg.ifType >= MTD_SPI_IF_QUAD) || in HifmcCntlrSpinorQeEnableMx25l()
39 if ((!!(status & MTD_SPI_SR_QE_MASK)) == enable) { in HifmcCntlrSpinorQeEnableMx25l()
40 HDF_LOGI("%s: qe status:%d, qe enable:%d", __func__, status, enable); in HifmcCntlrSpinorQeEnableMx25l()
46 if (enable == 1) { in HifmcCntlrSpinorQeEnableMx25l()
70 if ((!!(status & MTD_SPI_SR_QE_MASK)) == enable) { in HifmcCntlrSpinorQeEnableMx25l()
71 HDF_LOGI("%s: qe enable:%d set success", __func__, enable); in HifmcCntlrSpinorQeEnableMx25l()
74 HDF_LOGE("%s: qe enable in HifmcCntlrSpinorQeEnableMx25l()
[all...]
H A Dhifmc100_spi_nor_ids.c60 HDF_LOGD("%s: write enable already set", __func__); in HifmcCntlrSpinorWriteEnableDefault()
94 int enable; in HifmcCntlrSpinorQeEnableDefault() local
101 enable = ((spi->writeCfg.ifType >= MTD_SPI_IF_QUAD) || in HifmcCntlrSpinorQeEnableDefault()
104 if ((!!(config & MTD_SPI_CR_QE_MASK)) == enable) { in HifmcCntlrSpinorQeEnableDefault()
105 HDF_LOGI("%s: qe config:%d, qe enable:%d", __func__, config, enable); in HifmcCntlrSpinorQeEnableDefault()
113 if (enable == 1) { in HifmcCntlrSpinorQeEnableDefault()
138 if ((!!(config & MTD_SPI_CR_QE_MASK)) == enable) { in HifmcCntlrSpinorQeEnableDefault()
139 HDF_LOGI("%s: qe enable:%d set success", __func__, enable); in HifmcCntlrSpinorQeEnableDefault()
156 HifmcCntlrSpinorEntry4AddrDefault(struct SpiFlash *spi, int enable) HifmcCntlrSpinorEntry4AddrDefault() argument
[all...]
/device/soc/hisilicon/common/hal/middleware/ffmpeg_adapt/
H A Dconfigure_llvm92 --enable-rpath use rpath to allow installing libraries in paths
98 --enable-gpl allow use of GPL code, the resulting libs
100 --enable-version3 upgrade (L)GPL to version 3 [no]
101 --enable-nonfree allow use of nonfree code, the resulting libs
106 --enable-shared build shared libraries [no]
107 --enable-small optimize for size instead of speed
109 --enable-gray enable full grayscale support (slower color)
135 --enable-avresample enable libavresampl
674 enable(){ global() function
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/hal/ctrl/hisiv100/
H A Dhdmi_hal_ctrl.c281 static hi_void ctrl_audio_mute_set(hi_bool enable) in ctrl_audio_mute_set() argument
283 hdmi_reg_aud_mute_en_set(enable); in ctrl_audio_mute_set()
295 static hi_void ctrl_audio_i2s_enable_set(hi_bool enable) in ctrl_audio_i2s_enable_set() argument
298 audio_i2s_enable = enable ? HDMI_AUDIO_I2S_SD_ALL : HDMI_AUDIO_I2S_SD_NONE; in ctrl_audio_i2s_enable_set()
449 /* set GCP avmute function enable, sent loop */ in ctrl_avmute_set()
457 static hi_s32 ctrl_avmute_get(hi_bool *enable) in ctrl_avmute_get() argument
459 *enable = HI_FALSE; in ctrl_avmute_get()
463 *enable = HI_TRUE; in ctrl_avmute_get()
505 static hi_void ctrl_video_path_dither_set(hi_bool enable, hdmi_video_dither dither_mode) in ctrl_video_path_dither_set() argument
507 hdmi_reg_dither_rnd_bypass_set((!enable)); in ctrl_video_path_dither_set()
540 ctrl_video_color_ycbcr422_set(hi_bool enable) ctrl_video_color_ycbcr422_set() argument
554 ctrl_video_color_ycbcr420_set(hi_bool enable) ctrl_video_color_ycbcr420_set() argument
694 ctrl_vendor_infoframe_en_set(hi_bool enable) ctrl_vendor_infoframe_en_set() argument
721 ctrl_avi_infoframe_en_set(hi_bool enable) ctrl_avi_infoframe_en_set() argument
813 ctrl_video_path_dither_get(hi_bool *enable, hdmi_video_dither *dither_mode) ctrl_video_path_dither_get() argument
940 ctrl_vendor_infoframe_en_get(hi_bool *enable) ctrl_vendor_infoframe_en_get() argument
1003 ctrl_avi_infoframe_en_get(hi_bool *enable) ctrl_avi_infoframe_en_get() argument
1086 ctrl_video_mute_set(hi_bool enable) ctrl_video_mute_set() argument
1109 ctrl_video_mute_get(hi_bool *enable) ctrl_video_mute_get() argument
1120 ctrl_audio_infoframe_en_set(hi_bool enable) ctrl_audio_infoframe_en_set() argument
1129 ctrl_audio_infoframe_en_get(hi_bool *enable) ctrl_audio_infoframe_en_get() argument
1207 ctrl_gbd_infoframe_en_set(hi_bool enable) ctrl_gbd_infoframe_en_set() argument
1214 ctrl_gbd_infoframe_en_get(hi_bool *enable) ctrl_gbd_infoframe_en_get() argument
1277 ctrl_drm_infoframe_en_set(hi_bool enable) ctrl_drm_infoframe_en_set() argument
1284 ctrl_drm_infoframe_en_get(hi_bool *enable) ctrl_drm_infoframe_en_get() argument
1386 ctrl_hpd_intr_enable(hi_bool enable) ctrl_hpd_intr_enable() argument
1470 ctrl_null_packet_set(hi_bool enable) ctrl_null_packet_set() argument
1601 hal_hdmi_ctrl_avmute_get(hdmi_device_id hdmi, hi_bool *enable) hal_hdmi_ctrl_avmute_get() argument
1657 hal_hdmi_ctrl_infoframe_en_set(hdmi_device_id hdmi, hdmi_infoframe_id infoframe_id, hi_bool enable) hal_hdmi_ctrl_infoframe_en_set() argument
1760 hal_hdmi_ctrl_video_mute_set(hdmi_device_id hdmi, hi_bool enable) hal_hdmi_ctrl_video_mute_set() argument
1772 hal_hdmi_ctrl_video_mute_get(hdmi_device_id hdmi, hi_bool *enable) hal_hdmi_ctrl_video_mute_get() argument
1783 hal_hdmi_ctrl_audio_mute_set(hdmi_device_id hdmi, hi_bool enable) hal_hdmi_ctrl_audio_mute_set() argument
1795 hal_hdmi_ctrl_audio_path_enable_set(hdmi_device_id hdmi, hi_bool enable) hal_hdmi_ctrl_audio_path_enable_set() argument
1961 hal_hdmi_ctrl_infoframe_en_get(hdmi_device_id hdmi, hdmi_infoframe_id infoframe_id, hi_bool *enable) hal_hdmi_ctrl_infoframe_en_get() argument
[all...]
H A Dhdmi_hal_ctrl.h115 hi_bool enable; // extern thread cfg member
161 hi_s32 hal_hdmi_ctrl_avmute_get(hdmi_device_id hdmi, hi_bool *enable);
163 hi_s32 hal_hdmi_ctrl_audio_mute_set(hdmi_device_id hdmi, hi_bool enable);
165 hi_s32 hal_hdmi_ctrl_audio_path_enable_set(hdmi_device_id hdmi, hi_bool enable);
171 hi_s32 hal_hdmi_ctrl_video_mute_set(hdmi_device_id hdmi, hi_bool enable);
173 hi_s32 hal_hdmi_ctrl_video_mute_get(hdmi_device_id hdmi, hi_bool *enable);
183 hi_s32 hal_hdmi_ctrl_infoframe_en_set(hdmi_device_id hdmi, hdmi_infoframe_id infoframe_id, hi_bool enable);
185 hi_s32 hal_hdmi_ctrl_infoframe_en_get(hdmi_device_id hdmi, hdmi_infoframe_id infoframe_id, hi_bool *enable);
/device/soc/rockchip/common/vendor/drivers/net/
H A Drfkill-bt.c162 (irq->gpio.enable == GPIO_ACTIVE_LOW) ? IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING, irq->name, in rfkill_rk_setup_wake_irq()
192 gpio_direction_output(wake->io, sleep ? !wake->enable : wake->enable); in rfkill_rk_sleep_bt_internal()
200 gpio_direction_output(wake->io, wake->enable); in rfkill_rk_sleep_bt_internal()
202 gpio_direction_output(wake->io, !wake->enable); in rfkill_rk_sleep_bt_internal()
308 if (gpio_get_value(poweron->io) == !poweron->enable) { in rfkill_rk_set_power()
309 gpio_direction_output(poweron->io, !poweron->enable); in rfkill_rk_set_power()
311 gpio_direction_output(poweron->io, poweron->enable); in rfkill_rk_set_power()
320 if (gpio_get_value(reset->io) == !reset->enable) { in rfkill_rk_set_power()
321 gpio_direction_output(reset->io, !reset->enable); in rfkill_rk_set_power()
[all...]
H A Drfkill-wlan.c188 gpio_direction_output(vbat->io, vbat->enable); in rfkill_set_wifi_bt_power()
192 gpio_direction_output(vbat->io, !(vbat->enable)); in rfkill_set_wifi_bt_power()
257 int level = mrfkill->pdata->mregulator.enable; in rockchip_wifi_power()
295 gpio_direction_output(poweron->io, poweron->enable); in rockchip_wifi_power()
300 gpio_direction_output(reset->io, reset->enable); in rockchip_wifi_power()
305 LOG("wifi turn on power [GPIO%d-%d]\n", poweron->io, poweron->enable); in rockchip_wifi_power()
309 gpio_direction_output(poweron->io, !(poweron->enable)); in rockchip_wifi_power()
314 gpio_direction_output(reset->io, !(reset->enable)); in rockchip_wifi_power()
326 LOG("wifi shut off power [GPIO%d-%d]\n", poweron->io, !poweron->enable); in rockchip_wifi_power()
383 gpio_flags = wifi_int_irq->enable; in rockchip_wifi_get_oob_irq_flag()
[all...]
/device/soc/rockchip/rk3588/kernel/net/rfkill/
H A Drfkill-bt.c169 (irq->gpio.enable == GPIO_ACTIVE_LOW) ? in rfkill_rk_setup_wake_irq()
200 gpio_direction_output(wake->io, sleep ? !wake->enable : wake->enable); in rfkill_rk_sleep_bt_internal()
209 gpio_direction_output(wake->io, wake->enable); in rfkill_rk_sleep_bt_internal()
211 gpio_direction_output(wake->io, !wake->enable); in rfkill_rk_sleep_bt_internal()
319 if (gpio_get_value(poweron->io) == !poweron->enable) { in rfkill_rk_set_power()
321 !poweron->enable); in rfkill_rk_set_power()
324 poweron->enable); in rfkill_rk_set_power()
332 if (gpio_get_value(reset->io) == !reset->enable) { in rfkill_rk_set_power()
334 !reset->enable); in rfkill_rk_set_power()
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/
H A Dmali_kbase_hwcnt_legacy.c35 * @enable_map: Counter enable map.
46 int kbase_hwcnt_legacy_client_create(struct kbase_hwcnt_virtualizer *hvirt, struct kbase_ioctl_hwcnt_enable *enable, in kbase_hwcnt_legacy_client_create() argument
54 if (!hvirt || !enable || !enable->dump_buffer || !out_hlcli) { in kbase_hwcnt_legacy_client_create()
65 hlcli->user_dump_buf = (void __user *)(uintptr_t)enable->dump_buffer; in kbase_hwcnt_legacy_client_create()
72 /* Translate from the ioctl enable map to the internal one */ in kbase_hwcnt_legacy_client_create()
73 phys_em.fe_bm = enable->fe_bm; in kbase_hwcnt_legacy_client_create()
74 phys_em.shader_bm = enable->shader_bm; in kbase_hwcnt_legacy_client_create()
75 phys_em.tiler_bm = enable->tiler_bm; in kbase_hwcnt_legacy_client_create()
76 phys_em.mmu_l2_bm = enable in kbase_hwcnt_legacy_client_create()
[all...]
/device/soc/hisilicon/common/platform/mipi_csi/
H A Dmipi_rx_hi2121.h48 void MipiRxDrvSetMipiCropEn(uint8_t devno, int enable);
62 void MipiRxDrvSetMemCken(uint8_t devno, int enable);
63 void MipiRxDrvSetClrCken(uint8_t devno, int enable);
69 void MipiRxDrvSetCmosEn(unsigned int phyId, int enable);
71 void MipiRxDrvSetPhyCilEn(unsigned int laneBitmap, int enable);
73 void MipiRxDrvSetPhyCfgEn(unsigned int laneBitmap, int enable);
74 void MipiRxSetPhyRgLp0ModeEn(unsigned int phyId, int enable);
75 void MipiRxSetPhyRgLp1ModeEn(unsigned int phyId, int enable);
79 void MipiRxDrvSetLvdsCropEn(uint8_t devno, int enable);
/device/soc/hisilicon/common/platform/mtd/hifmc100/spi_nand/
H A Dhifmc100_spi_nand_ids.c68 HDF_LOGD("%s: write enable already set", __func__); in HifmcCntlrSpinandWriteEnableDefault()
108 int enable; in HifmcCntlrSpinandQeEnableDefault() local
115 enable = ((spi->writeCfg.ifType >= MTD_SPI_IF_QUAD) || in HifmcCntlrSpinandQeEnableDefault()
121 if (!!(feature & MTD_SPI_FEATURE_QE_ENABLE) == enable) { in HifmcCntlrSpinandQeEnableDefault()
122 HDF_LOGI("%s: qe feature:%d, qe enable:%d", __func__, feature, enable); in HifmcCntlrSpinandQeEnableDefault()
126 if (enable == 1) { in HifmcCntlrSpinandQeEnableDefault()
132 HDF_LOGD("%s: spi nand %s quad", __func__, (enable == 1) ? "enable" : "disable"); in HifmcCntlrSpinandQeEnableDefault()
144 if (!!(feature & MTD_SPI_FEATURE_QE_ENABLE) == enable) { in HifmcCntlrSpinandQeEnableDefault()
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_instr_backend.c34 struct kbase_instr_hwcnt_enable *enable) in kbase_instr_hwcnt_enable_internal()
46 if ((enable->dump_buffer == 0ULL) || (enable->dump_buffer & (KBASE_INSTR_STATE_USE - 1))) { in kbase_instr_hwcnt_enable_internal()
67 kbdev->hwcnt.addr = enable->dump_buffer; in kbase_instr_hwcnt_enable_internal()
68 kbdev->hwcnt.addr_bytes = enable->dump_buffer_bytes; in kbase_instr_hwcnt_enable_internal()
77 if (enable->use_secondary) in kbase_instr_hwcnt_enable_internal()
84 kbase_reg_write(kbdev, GPU_CONTROL_MCU_REG(PRFCNT_BASE_LO), enable->dump_buffer & 0xFFFFFFFF); in kbase_instr_hwcnt_enable_internal()
85 kbase_reg_write(kbdev, GPU_CONTROL_MCU_REG(PRFCNT_BASE_HI), enable->dump_buffer >> 0x20); in kbase_instr_hwcnt_enable_internal()
87 kbase_reg_write(kbdev, GPU_CONTROL_MCU_REG(PRFCNT_CSHW_EN), enable->fe_bm); in kbase_instr_hwcnt_enable_internal()
89 kbase_reg_write(kbdev, GPU_CONTROL_MCU_REG(PRFCNT_SHADER_EN), enable in kbase_instr_hwcnt_enable_internal()
33 kbase_instr_hwcnt_enable_internal(struct kbase_device *kbdev, struct kbase_context *kctx, struct kbase_instr_hwcnt_enable *enable) kbase_instr_hwcnt_enable_internal() argument
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/hi3516cv500/mipi_rx/
H A Dmipi_rx_hal.h121 void mipi_rx_drv_set_mipi_crop_en(combo_dev_t devno, int enable);
135 void mipi_rx_drv_set_mem_cken(combo_dev_t devno, int enable);
136 void mipi_rx_drv_set_clr_cken(combo_dev_t devno, int enable);
142 void mipi_rx_drv_set_cmos_en(unsigned int phy_id, int enable);
144 void mipi_rx_drv_set_phy_cil_en(unsigned int lane_bitmap, int enable);
146 void mipi_rx_drv_set_phy_cfg_en(unsigned int lane_bitmap, int enable);
147 void mipi_rx_set_phy_rg_lp0_mode_en(unsigned int phy_id, int enable);
148 void mipi_rx_set_phy_rg_lp1_mode_en(unsigned int phy_id, int enable);
152 void mipi_rx_drv_set_lvds_crop_en(combo_dev_t devno, int enable);
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hifb/drv/hi3516cv500/
H A Dhifb_vou_graphics.h79 hi_bool vou_graphics_enable_dcmp(GRAPHIC_LAYER gfx_layer, hi_bool enable);
80 hi_bool vou_graphics_get_dcmp_enable_state(GRAPHIC_LAYER gfx_layer, hi_bool *enable);
81 hi_void vou_graphics_enable_wbc(hal_disp_layer gfx_layer, hi_bool enable);
98 hi_bool vou_graphics_get_gfx_pre_mult(GRAPHIC_LAYER gfx_layer, hi_u32 *enable);
99 hi_bool vou_graphics_set_gfx_pre_mult(GRAPHIC_LAYER gfx_layer, hi_u32 enable);
133 hi_s32 vou_graphics_enable_layer(GRAPHIC_LAYER gfx_layer, hi_bool enable);
142 hi_s32 vou_graphics_enable_int(hi_u32 layer_index, hi_bool enable);
148 hi_bool vou_graphics_enable_ghdr(GRAPHIC_LAYER gfx_layer, hi_bool enable);
151 hi_bool vou_graphics_enable_zme(GRAPHIC_LAYER gfx_layer, RECT_S *in_rect, RECT_S *out_rect, hi_bool enable);
H A Dhifb_vou_drv.c121 hi_s32 hifb_drv_enable_layer(hi_u32 layer_id, hi_bool enable) in hifb_drv_enable_layer() argument
123 return vou_graphics_enable_layer(g_hifblayer_to_hwlayer[layer_id], enable); in hifb_drv_enable_layer()
131 * 3.alpha, global alpha,CSC,CSC enable, get interface type
207 hi_trace_fb(HI_DBG_ERR, "the global alpha can not set to 1 when the pre-mult mode is enable\n"); in hifb_drv_set_layer_alpha()
231 /* Pre-multiply enable is not supported when the data format is ARGB1555 */ in hifb_drv_set_layer_data_fmt()
384 hi_s32 hifb_drv_gamma_enable(hi_u32 layer_id, hi_bool enable) in hifb_drv_gamma_enable() argument
387 hi_unused(enable); in hifb_drv_gamma_enable()
465 /* Pre-multiply enable is not supported when the data format is ARGB1555 */ in hifb_drv_set_pre_mul()
585 hi_bool hifb_drv_enable_dcmp(hi_u32 layer_id, hi_bool enable) in hifb_drv_enable_dcmp() argument
588 hi_unused(enable); in hifb_drv_enable_dcmp()
592 hifb_drv_get_dcmp_enable_state(hi_u32 layer_id, hi_bool *enable) hifb_drv_get_dcmp_enable_state() argument
606 hifb_drv_enable_ghdr(hi_u32 layer_id, hi_bool enable) hifb_drv_enable_ghdr() argument
613 hifb_drv_enable_zme(hi_u32 layer_id, HIFB_RECT *in_rect, HIFB_RECT *out_rect, hi_bool enable) hifb_drv_enable_zme() argument
643 hifb_drv_enable_wbc_int(hi_u32 layer_id, hi_bool enable) hifb_drv_enable_wbc_int() argument
657 hifb_drv_enable_wbc(hi_u32 layer_id, hi_bool enable) hifb_drv_enable_wbc() argument
728 hifb_drv_graphics_enable_int(hi_u32 layer_id, hi_bool enable) hifb_drv_graphics_enable_int() argument
[all...]
H A Dhifb_vou_graphics.c26 hi_bool vo_enable; /* Device enable flag */
125 hi_bool vou_graphics_get_gfx_pre_mult(GRAPHIC_LAYER layer, hi_u32 *enable) in vou_graphics_get_gfx_pre_mult() argument
130 return graphic_drv_get_gfx_pre_mult(disp_layer, enable); in vou_graphics_get_gfx_pre_mult()
133 hi_bool vou_graphics_set_gfx_pre_mult(GRAPHIC_LAYER layer, hi_u32 enable) in vou_graphics_set_gfx_pre_mult() argument
138 return graphic_drv_set_gfx_pre_mult(disp_layer, enable); in vou_graphics_set_gfx_pre_mult()
372 hi_s32 vou_graphics_enable_layer(GRAPHIC_LAYER layer, hi_bool enable) in vou_graphics_enable_layer() argument
380 return graphic_drv_enable_layer(gfx_layer, enable); in vou_graphics_enable_layer()
420 hi_bool vou_graphics_enable_dcmp(GRAPHIC_LAYER layer, hi_bool enable) in vou_graphics_enable_dcmp() argument
425 return graphic_drv_enable_dcmp(gfx_layer, enable); in vou_graphics_enable_dcmp()
428 hi_bool vou_graphics_get_dcmp_enable_state(GRAPHIC_LAYER layer, hi_bool *enable) in vou_graphics_get_dcmp_enable_state() argument
441 vou_graphics_enable_ghdr(GRAPHIC_LAYER layer, hi_bool enable) vou_graphics_enable_ghdr() argument
448 vou_graphics_enable_zme(GRAPHIC_LAYER layer, RECT_S *in_rect, RECT_S *out_rect, hi_bool enable) vou_graphics_enable_zme() argument
619 vou_graphics_enable_int(hi_u32 layer_index, hi_bool enable) vou_graphics_enable_int() argument
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_liteos/include/adapt/
H A Dhi_comm_sns_adapt.h40 hi_bool enable; member
48 hi_bool enable; member
124 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Edge Mark */ member
130 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable HLC module */ member
136 hi_bool enable; member
207 hi_bool enable; /* RW;Range:[0,1];Format:1.0; */ member
215 hi_bool enable; member
255 hi_bool enable; member
261 hi_bool enable; member
274 hi_bool enable; member
282 hi_bool enable; /* RW,Range: [ 0, 1] */ global() member
292 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; AntiFalseColor Enable */ global() member
298 hi_bool enable; global() member
320 hi_bool enable; global() member
372 hi_bool enable; global() member
[all...]
H A Dhi_comm_isp_adapt.h41 hi_bool long_frm_int_en; /* when wdr mode enable/disable long frame pipe interrupt. */
197 hi_bool motion_comp; /* RW;Range:[0, 0x1];Format:1.0; enable/disable motion compensation */
202 hi_bool force_long; /* RW;Range:[0, 1];Format:1.0; enable/disable force long;
216 hi_isp_bnr_mode bnr_mode; /* RW;Range:[0, 1];Format:1.0; enable/disable the bnr of wdr */
217 hi_bool short_frame_nr; /* RW;Range:[0, 1];Format:1.0; enable/disable the bnr of short frame
289 hi_bool enable; member
389 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; */ member
416 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0 */ member
430 hi_bool enable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CSC Function */ member
446 hi_bool enable; /* R member
509 hi_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the static defect-pixel module, global() member
552 hi_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the dynamic defect-pixel module */ global() member
563 hi_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable dis module, global() member
568 hi_bool enable; /* RW; Range:[0, 1];Format:1.0; HI_TRUE: enable lsc; HI_FALSE: disable lsc */ global() member
672 hi_bool enable; /* RW; Range:[0, 1];Format:1.0; enable/disable rlsc */ global() member
755 hi_bool enable; /* RW; Range:[0,1];Format:1.0;Acs Enable */ global() member
792 hi_bool enable; /* RW;Range:[0, 1];Format:1.0; Nr Enable */ global() member
834 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; De Enable */ global() member
848 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; Enable/Disable RGBIR module */ global() member
863 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Gamma Function */ global() member
870 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable PreGamma Function */ global() member
881 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable PreLogLUT Function. global() member
886 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable LogLUT Function. global() member
972 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable sharpen module */ global() member
984 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Edge Mark */ global() member
992 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable HLC module */ global() member
999 hi_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the crosstalk removal module */ global() member
1039 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; AntiFalseColor Enable */ global() member
1118 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable demosaic module */ global() member
1164 hi_bool enable; /* RW;Range:[0,1];Format:1.0; */ global() member
1184 hi_bool enable; /* RW;Range:[0,1];Format:1.0; */ global() member
1210 hi_bool enable; /* RW;Range: [0, 1];Format:1.0; enable/disable local cac */ global() member
1226 hi_bool enable; /* RW; Range: [0, 1];Format: 1.0; enable/disable global cac */ global() member
1256 hi_bool enable; /* RW;Range:[0, 1];Format:1.0; enable/disable ridial crop. global() member
1336 hi_bool enable; /* RW; Range: [0,1]; Format:1.0;AE crop enable. */ global() member
1374 hi_bool enable; global() member
1380 hi_bool enable; global() member
1402 hi_bool enable; /* RW; Range: [0,1]; Format:1.0; AF crop enable */ global() member
1448 hi_bool enable; /* RW; Range: [0,1]; AF enable. */ global() member
1630 hi_bool enable; /* RW; Range: [0,1]; Format:1.0;AWB crop enable */ global() member
1886 hi_bool enable; /* RW;iris enable/disable */ global() member
1913 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ global() member
1920 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ global() member
2138 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; smart ae enable or not */ global() member
2177 hi_bool enable; global() member
2191 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; Outdoor/Indoor scenario determination enable */ global() member
2208 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; global() member
2219 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; global() member
2269 hi_bool enable; /* RW; Range:[0x0, 0x1]; Format:1.0;If AWB is disabled, static wb gain will be used, global() member
2379 hi_u8 enable; /* RW;Range:[0,1]; lut enable */ global() member
2601 hi_bool enable; /* RW, HI_TRUE: enable IR_auto function; HI_TRUE: disable IR_auto function. */ global() member
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/include/adapt/
H A Dhi_comm_sns_adapt.h40 hi_bool enable; member
48 hi_bool enable; member
124 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Edge Mark */ member
130 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable HLC module */ member
136 hi_bool enable; member
207 hi_bool enable; /* RW;Range:[0,1];Format:1.0; */ member
215 hi_bool enable; member
255 hi_bool enable; member
261 hi_bool enable; member
274 hi_bool enable; member
282 hi_bool enable; /* RW,Range: [ 0, 1] */ global() member
292 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; AntiFalseColor Enable */ global() member
298 hi_bool enable; global() member
320 hi_bool enable; global() member
372 hi_bool enable; global() member
[all...]
H A Dhi_comm_isp_adapt.h41 hi_bool long_frm_int_en; /* when wdr mode enable/disable long frame pipe interrupt. */
197 hi_bool motion_comp; /* RW;Range:[0, 0x1];Format:1.0; enable/disable motion compensation */
202 hi_bool force_long; /* RW;Range:[0, 1];Format:1.0; enable/disable force long;
216 hi_isp_bnr_mode bnr_mode; /* RW;Range:[0, 1];Format:1.0; enable/disable the bnr of wdr */
217 hi_bool short_frame_nr; /* RW;Range:[0, 1];Format:1.0; enable/disable the bnr of short frame
289 hi_bool enable; member
389 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; */ member
416 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0 */ member
430 hi_bool enable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CSC Function */ member
446 hi_bool enable; /* R member
509 hi_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the static defect-pixel module, global() member
552 hi_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the dynamic defect-pixel module */ global() member
563 hi_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable dis module, global() member
568 hi_bool enable; /* RW; Range:[0, 1];Format:1.0; HI_TRUE: enable lsc; HI_FALSE: disable lsc */ global() member
672 hi_bool enable; /* RW; Range:[0, 1];Format:1.0; enable/disable rlsc */ global() member
755 hi_bool enable; /* RW; Range:[0,1];Format:1.0;Acs Enable */ global() member
792 hi_bool enable; /* RW;Range:[0, 1];Format:1.0; Nr Enable */ global() member
834 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; De Enable */ global() member
848 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; Enable/Disable RGBIR module */ global() member
863 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Gamma Function */ global() member
870 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable PreGamma Function */ global() member
881 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable PreLogLUT Function. global() member
886 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable LogLUT Function. global() member
972 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable sharpen module */ global() member
984 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Edge Mark */ global() member
992 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable HLC module */ global() member
999 hi_bool enable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the crosstalk removal module */ global() member
1039 hi_bool enable; /* RW;Range:[0x0,0x1];Format:1.0; AntiFalseColor Enable */ global() member
1118 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable demosaic module */ global() member
1164 hi_bool enable; /* RW;Range:[0,1];Format:1.0; */ global() member
1184 hi_bool enable; /* RW;Range:[0,1];Format:1.0; */ global() member
1210 hi_bool enable; /* RW;Range: [0, 1];Format:1.0; enable/disable local cac */ global() member
1226 hi_bool enable; /* RW; Range: [0, 1];Format: 1.0; enable/disable global cac */ global() member
1256 hi_bool enable; /* RW;Range:[0, 1];Format:1.0; enable/disable ridial crop. global() member
1336 hi_bool enable; /* RW; Range: [0,1]; Format:1.0;AE crop enable. */ global() member
1374 hi_bool enable; global() member
1380 hi_bool enable; global() member
1402 hi_bool enable; /* RW; Range: [0,1]; Format:1.0; AF crop enable */ global() member
1448 hi_bool enable; /* RW; Range: [0,1]; AF enable. */ global() member
1630 hi_bool enable; /* RW; Range: [0,1]; Format:1.0;AWB crop enable */ global() member
1886 hi_bool enable; /* RW;iris enable/disable */ global() member
1913 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ global() member
1920 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; */ global() member
2138 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; smart ae enable or not */ global() member
2177 hi_bool enable; global() member
2191 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; Outdoor/Indoor scenario determination enable */ global() member
2208 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; global() member
2219 hi_bool enable; /* RW; Range:[0, 1]; Format:1.0; global() member
2269 hi_bool enable; /* RW; Range:[0x0, 0x1]; Format:1.0;If AWB is disabled, static wb gain will be used, global() member
2379 hi_u8 enable; /* RW;Range:[0,1]; lut enable */ global() member
2601 hi_bool enable; /* RW, HI_TRUE: enable IR_auto function; HI_TRUE: disable IR_auto function. */ global() member
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/components/at/src/
H A Dat_lowpower.c333 unsigned char enable; in at_set_arpoffload() local
344 enable = (unsigned char)atoi(argv[0]); in at_set_arpoffload()
346 if (enable != 0) { in at_set_arpoffload()
350 if (enable != 1) { in at_set_arpoffload()
359 if (hi_wifi_arp_offload_setting(ifname, enable, ip_addr) != HI_ERR_SUCCESS) { in at_set_arpoffload()
413 unsigned char enable; in at_set_ndoffload() local
424 enable = (unsigned char)atoi(argv[0]); in at_set_ndoffload()
426 if (enable != 0) { in at_set_ndoffload()
430 if (enable != 1) { in at_set_ndoffload()
439 if (hi_wifi_nd_offload_setting(ifname, enable, (unsigne in at_set_ndoffload()
[all...]
/device/soc/rockchip/common/sdk_linux/include/linux/regulator/
H A Ddriver.h52 * @enable: Configure the regulator as enabled.
81 * @set_active_discharge: Set active discharge enable/disable of regulators.
141 int (*set_active_discharge)(struct regulator_dev *, bool enable);
143 /* enable/disable regulator */
144 int (*enable)(struct regulator_dev *); member
155 /* Time taken to enable or set voltage on the regulator */
176 int (*set_bypass)(struct regulator_dev *dev, bool enable);
177 int (*get_bypass)(struct regulator_dev *dev, bool *enable);
185 /* enable/disable regulator in suspend state */
270 * @enable_reg: Register for control when using regmap enable/disabl
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-hdcp.c371 if (!hdcp->enable) { in dw_hdmi_hdcp_start()
415 * XXX: to sleep 100ms here between output hdmi and enable hdcpclk, in dw_hdmi_hdcp_start()
430 if (!hdcp->enable) { in dw_hdmi_hdcp_stop()
555 bool enable = 0; in hdcp_enable_read() local
559 enable = hdcp->enable; in hdcp_enable_read()
562 return snprintf(buf, PAGE_SIZE, "%d\n", enable); in hdcp_enable_read()
567 bool enable; in hdcp_enable_write() local
574 if (kstrtobool(buf, &enable)) { in hdcp_enable_write()
578 if (hdcp->enable ! in hdcp_enable_write()
[all...]

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