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Searched refs:chn (Results 1 - 25 of 31) sorted by relevance

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/device/soc/rockchip/rk2206/hardware/include/lz_hardware/
H A Dspi.h99 * @chn: Indicates the spi channel based on CSn.
107 unsigned int chn; member
158 static inline unsigned int LzSpiRead(unsigned int id, unsigned int chn, void *buf, unsigned int len) in LzSpiRead() argument
162 msg.chn = chn; in LzSpiRead()
172 static inline unsigned int LzSpiWrite(unsigned int id, unsigned int chn, const void *buf, unsigned int len) in LzSpiWrite() argument
176 msg.chn = chn; in LzSpiWrite()
186 static inline unsigned int LzSpiWriteAndRead(unsigned int id, unsigned int chn, in LzSpiWriteAndRead() argument
192 msg.chn in LzSpiWriteAndRead()
202 LzSpiWriteThenRead(unsigned int id, unsigned int chn, const void *txBuf, unsigned int txLen, void *rxBuf, unsigned int rxLen) LzSpiWriteThenRead() argument
[all...]
H A Dbase.h62 CHN_S *chn; \
78 chn = &cntlr->chns[index]; \
79 if (chn->init) { \
87 CHN_S *chn; \
102 chn = &cntlr->chns[index]; \
103 if (!chn->init) { \
H A Dsaradc.h53 int LzSaradcReadValue(unsigned int chn, unsigned int *val);
/device/soc/hisilicon/hi3516dv300/sdk_linux/sample/taurus/ai_sample/ext_util/
H A Dposix_help.c39 int SkPairCreate(SkPair* chn) in SkPairCreate() argument
41 HI_ASSERT(chn); in SkPairCreate()
47 chn->in = fds[0]; in SkPairCreate()
48 chn->out = fds[1]; in SkPairCreate()
119 void SkPairDestroy(SkPair* chn) in SkPairDestroy() argument
121 HI_ASSERT(chn); in SkPairDestroy()
123 if (chn->in >= 0) { in SkPairDestroy()
124 if (close(chn->in) < 0) { in SkPairDestroy()
127 chn->in = -1; in SkPairDestroy()
129 if (chn in SkPairDestroy()
[all...]
H A Dposix_help.h44 int SkPairCreate(SkPair* chn);
62 void SkPairDestroy(SkPair* chn);
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/hi_adc/
H A Dhi_adc.c122 static int lsadc_chn_valid(int chn, int enable) in lsadc_chn_valid() argument
129 switch (chn) { in lsadc_chn_valid()
130 case 0: /* chn 0 */ in lsadc_chn_valid()
131 lsadc_reg_write(value << 8, 1 << 8, HISI_LSADC_CONFIG); /* 8: [8] bit for chn 0 */ in lsadc_chn_valid()
133 case 1: /* chn 1 */ in lsadc_chn_valid()
134 lsadc_reg_write(value << 9, 1 << 9, HISI_LSADC_CONFIG); /* 9: [9] bit for chn 1 */ in lsadc_chn_valid()
137 case 2: /* chn 2 */ in lsadc_chn_valid()
138 lsadc_reg_write(value << 10, 1 << 10, HISI_LSADC_CONFIG); /* 10: [10] bit for chn 2 */ in lsadc_chn_valid()
140 case 3: /* chn 3 */ in lsadc_chn_valid()
141 lsadc_reg_write(value << 11, 1 << 11, HISI_LSADC_CONFIG); /* 11: [11] bit for chn in lsadc_chn_valid()
216 lsadc_get_chn_value(unsigned int chn) lsadc_get_chn_value() argument
231 unsigned int chn; lsadc_irq_proc() local
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/thermal/
H A Drockchip_thermal.c137 int (*get_temp)(const struct chip_tsadc_table *table, int chn, void __iomem *reg, int *temp);
138 int (*set_alarm_temp)(const struct chip_tsadc_table *table, int chn, void __iomem *reg, int temp);
139 int (*set_tshut_temp)(const struct chip_tsadc_table *table, int chn, void __iomem *reg, int temp);
140 void (*set_tshut_mode)(struct regmap *grf, int chn, void __iomem *reg, enum tshut_mode m);
214 #define TSADCV2_DATA(chn) (0x20 + (chn)*0x04)
215 #define TSADCV2_COMP_INT(chn) (0x30 + (chn)*0x04)
216 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn)*
730 rk_tsadcv2_get_temp(const struct chip_tsadc_table *table, int chn, void __iomem *regs, int *temp) rk_tsadcv2_get_temp() argument
739 rk_tsadcv2_alarm_temp(const struct chip_tsadc_table *table, int chn, void __iomem *regs, int temp) rk_tsadcv2_alarm_temp() argument
772 rk_tsadcv2_tshut_temp(const struct chip_tsadc_table *table, int chn, void __iomem *regs, int temp) rk_tsadcv2_tshut_temp() argument
791 rk_tsadcv2_tshut_mode(struct regmap *grf, int chn, void __iomem *regs, enum tshut_mode mode) rk_tsadcv2_tshut_mode() argument
807 rk_tsadcv3_tshut_mode(struct regmap *grf, int chn, void __iomem *regs, enum tshut_mode mode) rk_tsadcv3_tshut_mode() argument
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/sysd/mkp/src/
H A Dsys_ext.c377 static hi_s32 sys_check_mem_chn(hi_mpp_chn *chn) in sys_check_mem_chn() argument
379 if (chn->mod_id >= HI_ID_BUTT) { in sys_check_mem_chn()
380 sys_err_trace("mod_id:%d is invalid !\n", chn->mod_id); in sys_check_mem_chn()
384 if ((chn->dev_id < 0) || (chn->dev_id >= (hi_s32)g_mem_ctx[chn->mod_id].max_dev_cnt) || in sys_check_mem_chn()
385 (chn->chn_id < 0) || (chn->chn_id >= (hi_s32)g_mem_ctx[chn->mod_id].max_chn_cnt)) { in sys_check_mem_chn()
386 sys_err_trace("mod_id:%d mod dev or chn i in sys_check_mem_chn()
505 sys_get_mmz_name(hi_mpp_chn *chn, hi_void **mmz_name) sys_get_mmz_name() argument
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/drivers/core/
H A Ddrv_symc_v100.c165 hi_log_debug("continue to compute chn %u\n", i); in drv_symc_interrupt_isr()
169 hi_log_debug("chn %u wake up\n", i); in drv_symc_interrupt_isr()
291 hi_log_error("crypto channel get context failed, ctx is null, chn = %u\n", chn_num); in drv_symc_wait_irq()
299 hi_log_error("wait done timeout, chn = %u\n", chn_num); in drv_symc_wait_irq()
311 static hi_void drv_symc_set_entry(hi_u32 chn, hi_u32 dma_addr, hi_u32 mmz_addr, const hi_void *cpu_addr) in drv_symc_set_entry() argument
314 symc_hard_context *ctx = (symc_hard_context *)g_symc_hard_channel[chn].ctx; in drv_symc_set_entry()
319 hi_log_info("chn %u, entry in dma addr 0x%x, mmz addr 0x%x, cpu addr 0x%pK\n", in drv_symc_set_entry()
320 chn, dma_addr, mmz_addr, cpu_addr); in drv_symc_set_entry()
321 symc_write(reg_chann_src_lst_saddr(chn), mmz_addr); /* node list must be mmz. */ in drv_symc_set_entry()
328 hi_log_info("chn in drv_symc_set_entry()
664 hi_u32 chn, last, first, i; drv_cipher_aes_test() local
939 hi_u32 chn = 0; drv_symc_alloc_chn() local
[all...]
H A Ddrv_symc_v200.c184 hi_log_debug("continue to compute chn %u\n", i); in drv_symc_interrupt_isr()
189 hi_log_debug("chn %u wake up\n", i); in drv_symc_interrupt_isr()
328 hi_log_error("wait done timeout, chn = %u\n", chn_num); in drv_symc_wait_irq()
364 static hi_s32 drv_symc_recover_entry(hi_u32 chn) in drv_symc_recover_entry() argument
368 symc_hard_context *ctx = &g_hard_context[chn]; in drv_symc_recover_entry()
375 * On ree, the chn may be seized by tee, in drv_symc_recover_entry()
376 * so we must check it, that is check we can write the reg of chn or not. in drv_symc_recover_entry()
378 symc_write(chann_cipher_in_node_start_addr(chn), addr_l32(ctx->dma_entry)); in drv_symc_recover_entry()
379 symc_write(chann_cipher_in_node_start_high(chn), addr_h32(ctx->dma_entry)); in drv_symc_recover_entry()
380 entry = symc_read(chann_cipher_in_node_start_addr(chn)); in drv_symc_recover_entry()
405 drv_symc_set_entry(hi_u32 chn, compat_addr dma_addr, const hi_void *cpu_addr) drv_symc_set_entry() argument
438 drv_symc_set_pad_buffer(hi_u32 chn, compat_addr dma_addr, const hi_void *cpu_addr) drv_symc_set_pad_buffer() argument
506 drv_symc_enable_secure(hi_u32 chn, hi_u32 enable) drv_symc_enable_secure() argument
[all...]
H A Ddrv_hash_v200.c89 hi_log_error("chn %u, src addr 0x%x, size 0x%x\n", chn_num, in->hash_start_addr, in->hash_alg_length); in hash_print_last_node()
106 hi_log_error("hash error: klad_key_use_err, chn %u !!!\n", chn_num); in drv_hash_get_err_code()
109 hi_log_error("hash error: alg_len_err, chn %u !!!\n", chn_num); in drv_hash_get_err_code()
112 hi_log_error("hash error: smmu_page_invalid, chn %u !!!\n", chn_num); in drv_hash_get_err_code()
115 hi_log_error("symc error: out_smmu_page_not_valid, chn %u !!!\n", chn_num); in drv_hash_get_err_code()
118 hi_log_error("symc error: klad_key_write_err, chn %u !!!\n", chn_num); in drv_hash_get_err_code()
180 hi_log_debug("chn %u wake up\n", i); in hash_interrupt_isr()
341 static hi_void hash_set_entry(hi_u32 chn, compat_addr dma_addr, const hi_void *cpu_addr) in hash_set_entry() argument
343 hash_hard_context *ctx = (hash_hard_context *)g_hash_hard_channel[chn].ctx; in hash_set_entry()
347 hash_in_cfg.u32 = hash_read(chann_hash_in_node_cfg(chn)); in hash_set_entry()
[all...]
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/based/ext_inc/
H A Ddev_ext.h74 #define UMAP_SET_CHN(f, chn) (*((hi_u32*)(f)) = (chn))
/device/soc/rockchip/rk3588/hardware/mpp/include/
H A Dmpi_enc_utils.h120 RK_S32 chn; member
216 RK_S32 chn; member
/device/soc/rockchip/rk3588/kernel/drivers/pci/controller/dwc/
H A Dpcie-dw-rockchip.c1346 int chn = obj->cur->chn; in rk_pcie_start_dma_dwc() local
1348 int ctr_off = PCIE_DMA_OFFSET + chn * 0x200; in rk_pcie_start_dma_dwc()
1377 table->start.chnl = table->chn; in rk_pcie_config_dma_dwc()
1410 u32 chn = 0; in rk_pcie_sys_irq_handler() local
1419 chn = rk_pcie->dma_obj->cur->chn; in rk_pcie_sys_irq_handler()
1421 if (status.donesta & BIT(chn)) { in rk_pcie_sys_irq_handler()
1422 clears.doneclr = 0x1 << chn; in rk_pcie_sys_irq_handler()
1428 if (status.abortsta & BIT(chn)) { in rk_pcie_sys_irq_handler()
[all...]
/device/soc/rockchip/rk3588/hardware/mpp/src/
H A Dmpi_enc_utils.c467 RK_S32 chn = info->chn; in hal_mpp_encode() local
609 mpp_err("chn %d encode put frame failed\n", chn); in hal_mpp_encode()
625 mpp_err("chn %d encode get packet failed\n", chn); in hal_mpp_encode()
681 mpp_log_q(quiet, "chn %d %s\n", chn, log_buf); in hal_mpp_encode()
690 mpp_log_q(quiet, "chn %d found last packet\n", chn); in hal_mpp_encode()
[all...]
/device/soc/rockchip/rk3566/sdk_linux/drivers/iio/adc/
H A Drockchip_saradc.c60 u32 chn; member
147 pr_info("chn[%d] val = %d\n", info->chn, info->last_val); in rockchip_saradc_isr()
319 writel(SARADC_CTRL_POWER_CTRL | (info->chn & SARADC_CTRL_CHN_MASK) | SARADC_CTRL_IRQ_ENABLE, in rockchip_saradc_timer()
347 info->chn = val; in saradc_test_chn_store()
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/drivers/
H A Dkapi_symc.c131 hi_u32 i, chn; in kapi_symc_release() local
149 chn = hi_handle_init(HI_ID_CIPHER, 0, i); in kapi_symc_release()
150 hi_log_info("symc release chn %u\n", chn); in kapi_symc_release()
151 ret = kapi_symc_destroy(chn); in kapi_symc_release()
166 hi_u32 chn = 0; in kapi_symc_create() local
176 ret = cryp_symc_alloc_chn(&chn); in kapi_symc_create()
183 ctx = &g_kapi_ctx[chn]; in kapi_symc_create()
188 *id = hi_handle_init(HI_ID_CIPHER, 0, chn); in kapi_symc_create()
192 hi_log_info("kapi_symc_create()- chn in kapi_symc_create()
[all...]
H A Dkapi_hash.c148 hi_u32 chn = 0; in kapi_hash_create() local
153 ret = crypto_channel_alloc(g_hash_ctx, HASH_SOFT_CHANNEL_MAX, HASH_SOFT_CHANNEL_MASK, &chn); in kapi_hash_create()
159 *id = chn; in kapi_hash_create()
161 hi_log_debug("kapi create soft chn %u\n", chn); in kapi_hash_create()
663 hi_log_info("hash release chn %u\n", i); in kapi_hash_release()
/device/soc/rockchip/rk3588/kernel/include/uapi/linux/
H A Drk-pcie-dma.h22 u32 chn; member
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/wal/
H A Dwal_scan.c315 hi_u32 chn; in wal_set_scan_channel() local
320 chn = (hi_u32)oal_ieee80211_frequency_to_channel((hi_s32)us_center_freq); in wal_set_scan_channel()
323 scan_param->pul_channels_2_g[num_chan_2g++] = chn; in wal_set_scan_channel()
/device/soc/rockchip/common/vendor/drivers/pci/
H A Drockchip-pcie-dma.h142 int chn; member
/device/soc/rockchip/common/sdk_linux/drivers/pci/controller/
H A Drockchip-pcie-dma.h143 int chn; member
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/arch/hi3516cv500/include/
H A Dvou_hal.h48 hi_bool hal_disp_set_dev_multi_chn_en(hal_disp_outputchannel chn, hal_multichn_en multi_chn_en);
/device/soc/rockchip/rk3588/kernel/include/linux/
H A Drockchip-pcie-dma.h145 int chn; member
/device/soc/rockchip/rk3588/kernel/drivers/pci/controller/
H A Drockchip-pcie-dma.h145 int chn; member

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