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Searched refs:PCLK_PWM0 (Results 1 - 12 of 12) sorted by relevance

/device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/
H A Drk1808-cru.h202 #define PCLK_PWM0 280 macro
H A Dpx30-cru.h164 #define PCLK_PWM0 339 macro
H A Drk3368-cru.h134 #define PCLK_PWM0 350 macro
H A Drk3568-cru.h61 #define PCLK_PWM0 48 macro
/device/soc/rockchip/rk3588/kernel/include/dt-bindings/clock/
H A Drk1808-cru.h202 #define PCLK_PWM0 280 macro
H A Drv1126-cru.h49 #define PCLK_PWM0 35 macro
H A Drk3568-cru.h61 #define PCLK_PWM0 48 macro
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rk3368.c582 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(12), 0, GFLAGS),
H A Dclk-rk3308.c660 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 3, GFLAGS),
H A Dclk-px30.c621 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus_pre", 0, PX30_CLKGATE_CON(14), 15, GFLAGS),
/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-rk1808.c579 GATE(PCLK_PWM0, "pclk_pwm0", "lsclk_bus_pre", 0, RK1808_CLKGATE_CON(16), 6, GFLAGS),
/device/soc/rockchip/rk3566/vendor/drivers/clk/
H A Dclk-rk3568.c1076 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_pdpmu", 0, RK3568_PMU_CLKGATE_CON(1), 6, GFLAGS),

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