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Searched refs:MMU_AS0 (Results 1 - 4 of 4) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/
H A Dmali_kbase_gpu_regmap.h184 #define MMU_AS0 0x400 /* Configuration registers for address space 0 */ macro
203 #define MMU_AS_REG(n, r) (MMU_REG(MMU_AS0 + ((n) << 6)) + (r))
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h260 #define MMU_AS0 0x400 /* Configuration registers for address space 0 */ macro
277 #define MMU_AS_REG(n, r) (MMU_REG(MMU_AS0 + ((n) << 6)) + (r))
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h263 #define MMU_AS0 0x400 /* Configuration registers for address space 0 */ macro
280 #define MMU_AS_REG(n, r) (MMU_REG(MMU_AS0 + ((n) << 6)) + (r))
/device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/
H A Dmali_kbase_gpu_regmap.h204 #define MMU_AS0 0x400 /* Configuration registers for address space 0 */ macro
223 #define MMU_AS_REG(n, r) (MMU_REG(MMU_AS0 + ((n) << 6)) + (r))

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