Searched refs:L2_PWRTRANS_HI (Results 1 - 9 of 9) sorted by relevance
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/ |
H A D | mali_kbase_gpu_regmap.h | 142 #define L2_PWRTRANS_HI 0x224 /* (RO) Level 2 cache power transition bitmap, high word */ macro
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/ |
H A D | mali_midg_regmap.h | 170 #define L2_PWRTRANS_HI 0x224 /* (RO) Level 2 cache power transition bitmap, high word */ macro
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/ |
H A D | mali_midg_regmap.h | 176 #define L2_PWRTRANS_HI 0x224 /* (RO) Level 2 cache power transition bitmap, high word */ macro
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/device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/ |
H A D | mali_kbase_gpu_regmap.h | 153 #define L2_PWRTRANS_HI 0x224 /* (RO) Level 2 cache power transition bitmap, high word */ macro
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/ |
H A D | mali_kbase_pm_driver.c | 882 dev_err(kbdev->dev, "\tL2 =%08x%08x\n", kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_PWRTRANS_HI), NULL), in kbase_pm_check_transitions_sync()
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/ |
H A D | mali_kbase_pm_driver.c | 985 L2_PWRTRANS_HI), NULL), in kbase_pm_check_transitions_sync()
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
H A D | mali_kbase_model_dummy.c | 1554 case GPU_CONTROL_REG(L2_PWRTRANS_HI):
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H A D | mali_kbase_pm_driver.c | 2137 L2_PWRTRANS_HI)),
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/ |
H A D | mali_kbase_pm_driver.c | 1612 dev_err(kbdev->dev, "\tL2 =%08x%08x\n", kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_PWRTRANS_HI)),
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