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Searched refs:L2_PWRTRANS_HI (Results 1 - 9 of 9) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/
H A Dmali_kbase_gpu_regmap.h142 #define L2_PWRTRANS_HI 0x224 /* (RO) Level 2 cache power transition bitmap, high word */ macro
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h170 #define L2_PWRTRANS_HI 0x224 /* (RO) Level 2 cache power transition bitmap, high word */ macro
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h176 #define L2_PWRTRANS_HI 0x224 /* (RO) Level 2 cache power transition bitmap, high word */ macro
/device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/
H A Dmali_kbase_gpu_regmap.h153 #define L2_PWRTRANS_HI 0x224 /* (RO) Level 2 cache power transition bitmap, high word */ macro
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_pm_driver.c882 dev_err(kbdev->dev, "\tL2 =%08x%08x\n", kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_PWRTRANS_HI), NULL), in kbase_pm_check_transitions_sync()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_pm_driver.c985 L2_PWRTRANS_HI), NULL), in kbase_pm_check_transitions_sync()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_model_dummy.c1554 case GPU_CONTROL_REG(L2_PWRTRANS_HI):
H A Dmali_kbase_pm_driver.c2137 L2_PWRTRANS_HI)),
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_pm_driver.c1612 dev_err(kbdev->dev, "\tL2 =%08x%08x\n", kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_PWRTRANS_HI)),

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